(no commit message)

diff --git a/openpower/sv/vector_ops.mdwn b/openpower/sv/vector_ops.mdwn
index e12e7e669eb4fcdbe70032d66d13f9320cd153d9..5f9007cf3a2cdf143a581de04f81951b364428da 100644 (file)
--- a/openpower/sv/vector_ops.mdwn
+++ b/openpower/sv/vector_ops.mdwn
@@ -72,6 +72,42 @@ Executable pseudocode demo:
 [[!inline pages="openpower/sv/bmask.py" quick="yes" raw="yes" ]]
 ```
 
+
+
+BM2-Form
+
+* bmask  RT,RA,RB,bm,L
+
+Pseudo-code:
+
+    if _RB = 0 then mask <- [1] * XLEN
+    else mask <- (RB)
+    ra <- (RA) & mask
+    a1 <- ra
+    if bm[4] = 0 then a1 <- ¬ra
+    mode2 <- bm[2:3]
+    if mode2 = 0 then a2 <- (¬ra)+1
+    if mode2 = 1 then a2 <- ra-1
+    if mode2 = 2 then a2 <- ra+1
+    if mode2 = 3 then a2 <- ¬(ra+1)
+    a1 <- a1 & mask
+    a2 <- a2 & mask
+    # select operator
+    mode3 <- bm[0:1]
+    if mode3 = 0 then result <- a1 | a2
+    if mode3 = 1 then result <- a1 & a2
+    if mode3 = 2 then result <- a1 ^ a2
+    if mode3 = 3 then result <- undefined([0]*XLEN)
+    result <- result & mask
+    # optionally restore masked-out bits
+    if L = 1 then
+        result <- result | (RA & ¬mask)
+    RT <- result
+
+Special Registers Altered:
+
+    None
+
 ## Carry-lookahead
 
 As a single scalar 32-bit instruction, up to 64 carry-propagation bits
@@ -79,8 +115,8 @@ may be computed.  When the output is then used as a Predicate mask it can
 be used to selectively perform the "add carry" of biginteger math, with
 `sv.addi/sm=rN RT.v, RA.v, 1`.
 
-* cprop RT,RA,RB
-* cprop. RT,RA,RB
+* cprop RT,RA,RB (Rc=0)
+* cprop. RT,RA,RB (Rc=1)
 
 pseudocode:
 
@@ -92,9 +128,9 @@ pseudocode:
 
 X-Form
 
-| 0.5|6.10|11.15|16.20| 21..30     |31| name      |  Form   |
+| 0:5|6:10|11:15|16:20| 21:30      |31| name      |  Form   |
 | -- | -- | --- | --- | ---------  |--| ----      | ------- |
-| NN | RT | RA  | RB  | 0110001110 |Rc|     cprop | X-Form  |
+| PO | RT | RA  | RB  | XO         |Rc|     cprop | X-Form  |
 
 used not just for carry lookahead, also a special type of predication mask operation.