arm-cores.def (arm1156t2-s, [...]): Use v6t2 tuning.

	gcc/
	* arm-cores.def (arm1156t2-s, arm1156t2f-s): Use v6t2 tuning.
	(cortex-a5, cortex-a8, cortex-a15, cortex-r4, cortex-r4f, cortex-m4)
	(cortex-m3, cortex-m1, cortex-m0): Use cortex tuning.
	* config/arm/arm-protos.h (tune_params): Add prefer_constant_pool
	field.
	* config/arm/arm.c (arm_slowmul_tune, arm_fastmul_tune)
	(arm_xscale_tune, arm_9e_tune, arm_cortex_a9_tune)
	(arm_fa726te_tune): Add prefer_constant_pool setting.
	(arm_v6t2_tune, arm_cortex_tune): New.
	* config/arm/arm.h (TARGET_USE_MOVT): Make dependent on
	prefer_constant_pool setting.

From-SVN: r174577

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 04dfb06971ed5d4f5c43f3b8226e2a26a7687d0d..5e97198dcbbe7143c51a3b0ea80528e25d87f483 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,17 @@
+2011-06-02  Julian Brown  <julian@codesourcery.com>
+
+       * arm-cores.def (arm1156t2-s, arm1156t2f-s): Use v6t2 tuning.
+       (cortex-a5, cortex-a8, cortex-a15, cortex-r4, cortex-r4f, cortex-m4)
+       (cortex-m3, cortex-m1, cortex-m0): Use cortex tuning.
+       * config/arm/arm-protos.h (tune_params): Add prefer_constant_pool
+       field.
+       * config/arm/arm.c (arm_slowmul_tune, arm_fastmul_tune)
+       (arm_xscale_tune, arm_9e_tune, arm_cortex_a9_tune)
+       (arm_fa726te_tune): Add prefer_constant_pool setting.
+       (arm_v6t2_tune, arm_cortex_tune): New.
+       * config/arm/arm.h (TARGET_USE_MOVT): Make dependent on
+       prefer_constant_pool setting.
+
 2011-06-02  Uros Bizjak  <ubizjak@gmail.com>
 
        * config/i386/i386.c (standard_sse_constant_p) <case 1>:

diff --git a/gcc/config/arm/arm-cores.def b/gcc/config/arm/arm-cores.def
index af0dbb49cc9244c2f9dcee4c4eeaa62d375f92d8..76acc69037f3489507db80fb0c55e71a57ce063c 100644 (file)
--- a/gcc/config/arm/arm-cores.def
+++ b/gcc/config/arm/arm-cores.def
@@ -122,16 +122,16 @@ ARM_CORE("arm1176jz-s",     arm1176jzs,   6ZK,                             FL_LDSCHED, 9e)
 ARM_CORE("arm1176jzf-s",  arm1176jzfs, 6ZK,                             FL_LDSCHED | FL_VFPV2, 9e)
 ARM_CORE("mpcorenovfp",          mpcorenovfp,  6K,                              FL_LDSCHED, 9e)
 ARM_CORE("mpcore",       mpcore,       6K,                              FL_LDSCHED | FL_VFPV2, 9e)
-ARM_CORE("arm1156t2-s",          arm1156t2s,   6T2,                             FL_LDSCHED, 9e)
-ARM_CORE("arm1156t2f-s",  arm1156t2fs,  6T2,                            FL_LDSCHED | FL_VFPV2, 9e)
-ARM_CORE("cortex-a5",    cortexa5,     7A,                              FL_LDSCHED, 9e)
-ARM_CORE("cortex-a8",    cortexa8,     7A,                              FL_LDSCHED, 9e)
+ARM_CORE("arm1156t2-s",          arm1156t2s,   6T2,                             FL_LDSCHED, v6t2)
+ARM_CORE("arm1156t2f-s",  arm1156t2fs,  6T2,                            FL_LDSCHED | FL_VFPV2, v6t2)
+ARM_CORE("cortex-a5",    cortexa5,     7A,                              FL_LDSCHED, cortex)
+ARM_CORE("cortex-a8",    cortexa8,     7A,                              FL_LDSCHED, cortex)
 ARM_CORE("cortex-a9",    cortexa9,     7A,                              FL_LDSCHED, cortex_a9)
-ARM_CORE("cortex-a15",   cortexa15,    7A,                              FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, 9e)
-ARM_CORE("cortex-r4",    cortexr4,     7R,                              FL_LDSCHED, 9e)
-ARM_CORE("cortex-r4f",   cortexr4f,    7R,                              FL_LDSCHED, 9e)
-ARM_CORE("cortex-r5",    cortexr5,     7R,                              FL_LDSCHED | FL_ARM_DIV, 9e)
-ARM_CORE("cortex-m4",    cortexm4,     7EM,                             FL_LDSCHED, 9e)
-ARM_CORE("cortex-m3",    cortexm3,     7M,                              FL_LDSCHED, 9e)
-ARM_CORE("cortex-m1",    cortexm1,     6M,                              FL_LDSCHED, 9e)
-ARM_CORE("cortex-m0",    cortexm0,     6M,                              FL_LDSCHED, 9e)
+ARM_CORE("cortex-a15",   cortexa15,    7A,                              FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex)
+ARM_CORE("cortex-r4",    cortexr4,     7R,                              FL_LDSCHED, cortex)
+ARM_CORE("cortex-r4f",   cortexr4f,    7R,                              FL_LDSCHED, cortex)
+ARM_CORE("cortex-r5",    cortexr5,     7R,                              FL_LDSCHED | FL_ARM_DIV, cortex)
+ARM_CORE("cortex-m4",    cortexm4,     7EM,                             FL_LDSCHED, cortex)
+ARM_CORE("cortex-m3",    cortexm3,     7M,                              FL_LDSCHED, cortex)
+ARM_CORE("cortex-m1",    cortexm1,     6M,                              FL_LDSCHED, cortex)
+ARM_CORE("cortex-m0",    cortexm0,     6M,                              FL_LDSCHED, cortex)

diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h
index fa252833dae667151b1dbc16ed3611a476ae2cd7..8e0d54d4d18f126b967722ac93afa6a41deb2928 100644 (file)
--- a/gcc/config/arm/arm-protos.h
+++ b/gcc/config/arm/arm-protos.h
@@ -224,6 +224,7 @@ struct tune_params
   int num_prefetch_slots;
   int l1_cache_size;
   int l1_cache_line_size;
+  bool prefer_constant_pool;
 };
 
 extern const struct tune_params *current_tune;

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 7b8fe4254cd62a0cb80419e451b0d84be26bf197..50e42b059ddc566ad5607f2548fe4204cef0d48d 100644 (file)
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -856,48 +856,73 @@ const struct tune_params arm_slowmul_tune =
 {
   arm_slowmul_rtx_costs,
   NULL,
-  3,
-  ARM_PREFETCH_NOT_BENEFICIAL
+  3,                                           /* Constant limit.  */
+  ARM_PREFETCH_NOT_BENEFICIAL,
+  true                                         /* Prefer constant pool.  */
 };
 
 const struct tune_params arm_fastmul_tune =
 {
   arm_fastmul_rtx_costs,
   NULL,
-  1,
-  ARM_PREFETCH_NOT_BENEFICIAL
+  1,                                           /* Constant limit.  */
+  ARM_PREFETCH_NOT_BENEFICIAL,
+  true                                         /* Prefer constant pool.  */
 };
 
 const struct tune_params arm_xscale_tune =
 {
   arm_xscale_rtx_costs,
   xscale_sched_adjust_cost,
-  2,
-  ARM_PREFETCH_NOT_BENEFICIAL
+  2,                                           /* Constant limit.  */
+  ARM_PREFETCH_NOT_BENEFICIAL,
+  true                                         /* Prefer constant pool.  */
 };
 
 const struct tune_params arm_9e_tune =
 {
   arm_9e_rtx_costs,
   NULL,
-  1,
-  ARM_PREFETCH_NOT_BENEFICIAL
+  1,                                           /* Constant limit.  */
+  ARM_PREFETCH_NOT_BENEFICIAL,
+  true                                         /* Prefer constant pool.  */
+};
+
+const struct tune_params arm_v6t2_tune =
+{
+  arm_9e_rtx_costs,
+  NULL,
+  1,                                           /* Constant limit.  */
+  ARM_PREFETCH_NOT_BENEFICIAL,
+  false                                                /* Prefer constant pool.  */
+};
+
+/* Generic Cortex tuning.  Use more specific tunings if appropriate.  */
+const struct tune_params arm_cortex_tune =
+{
+  arm_9e_rtx_costs,
+  NULL,
+  1,                                           /* Constant limit.  */
+  ARM_PREFETCH_NOT_BENEFICIAL,
+  false                                                /* Prefer constant pool.  */
 };
 
 const struct tune_params arm_cortex_a9_tune =
 {
   arm_9e_rtx_costs,
   cortex_a9_sched_adjust_cost,
-  1,
-  ARM_PREFETCH_BENEFICIAL(4,32,32)
+  1,                                           /* Constant limit.  */
+  ARM_PREFETCH_BENEFICIAL(4,32,32),
+  false                                                /* Prefer constant pool.  */
 };
 
 const struct tune_params arm_fa726te_tune =
 {
   arm_9e_rtx_costs,
   fa726te_sched_adjust_cost,
-  1,
-  ARM_PREFETCH_NOT_BENEFICIAL
+  1,                                           /* Constant limit.  */
+  ARM_PREFETCH_NOT_BENEFICIAL,
+  true                                         /* Prefer constant pool.  */
 };
 
 

diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 3b90201ad232a07fbbcf002e7182bf00ef8d90c0..0d16687eeec2ebbeb0ca75c4a408b01de271d0f4 100644 (file)
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -271,7 +271,8 @@ extern void (*arm_lang_output_object_attributes_hook)(void);
   (TARGET_32BIT && arm_arch6 && (arm_arch_notm || arm_arch7em))
 
 /* Should MOVW/MOVT be used in preference to a constant pool.  */
-#define TARGET_USE_MOVT (arm_arch_thumb2 && !optimize_size)
+#define TARGET_USE_MOVT \
+  (arm_arch_thumb2 && !optimize_size && !current_tune->prefer_constant_pool)
 
 /* We could use unified syntax for arm mode, but for now we just use it
    for Thumb-2.  */