cdelay(200);
}
+void ddrsw(void)
+{
+ CSR_DFII_CONTROL = DFII_CONTROL_CKE;
+ printf("DDR now under software control\n");
+}
+
+void ddrhw(void)
+{
+ CSR_DFII_CONTROL = DFII_CONTROL_SEL|DFII_CONTROL_CKE;
+ printf("DDR now under hardware control\n");
+}
+
+void ddrrow(char *_row)
+{
+ char *c;
+ unsigned int row;
+
+ if(*_row == 0) {
+ setaddr(0x0000);
+ CSR_DFII_BA_P0 = 0;
+ CSR_DFII_COMMAND_P0 = DFII_COMMAND_RAS|DFII_COMMAND_WE|DFII_COMMAND_CS;
+ cdelay(15);
+ printf("Precharged\n");
+ } else {
+ row = strtoul(_row, &c, 0);
+ if(*c != 0) {
+ printf("incorrect row\n");
+ return;
+ }
+ setaddr(row);
+ CSR_DFII_BA_P0 = 0;
+ CSR_DFII_COMMAND_P0 = DFII_COMMAND_RAS|DFII_COMMAND_CS;
+ cdelay(15);
+ printf("Activated row %d\n", row);
+ }
+}
+
void ddrrd(char *startaddr)
{
char *c;
init_sequence();
- setaddr(0x0000);
- CSR_DFII_BA_P0 = 0;
- CSR_DFII_COMMAND_P0 = DFII_COMMAND_RAS|DFII_COMMAND_CS;
- cdelay(15);
-
return 1;
}
else if(strcmp(token, "wcsr") == 0) wcsr(get_token(&c), get_token(&c));
else if(strcmp(token, "ddrinit") == 0) ddrinit();
+ else if(strcmp(token, "ddrrow") == 0) ddrrow(get_token(&c));
+ else if(strcmp(token, "ddrsw") == 0) ddrsw();
+ else if(strcmp(token, "ddrhw") == 0) ddrhw();
else if(strcmp(token, "ddrrd") == 0) ddrrd(get_token(&c));
else if(strcmp(token, "ddrwr") == 0) ddrwr(get_token(&c));