[riscv] Fix ambiguous .md attribute uses

This patch is part of a series that fixes ambiguous attribute
uses in .md files, i.e. cases in which attributes didn't use
<ITER:ATTR> to specify an iterator, and in which <ATTR> could
have different values depending on the iterator chosen.

No behavioural change -- produces the same code as before.

2019-07-08  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/riscv/pic.md (*local_pic_load_s<mode>)
	(*local_pic_load_u<mode>): Explicitly specify the mode iterator
	referenced by <mode>, giving...
	(*local_pic_load_s<SUBX:mode>, *local_pic_load_u<SUBX:mode>): ...these.
	* config/riscv/riscv.md (*sge<u>_<X:mode><GPR:mode>)
	(*slt<u>_<X:mode><GPR:mode>, *sle<u>_<X:mode><GPR:mode>): Explicitly
	use <X:MODE> for the mode attribute.

From-SVN: r273191

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 9f83f75b0bffa01d6c09bbbc0e55540f210a06e0..96ae53aa8b03575a0ccab36b7f44216365d0f08e 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,13 @@
+2019-07-08  Richard Sandiford  <richard.sandiford@arm.com>
+
+       * config/riscv/pic.md (*local_pic_load_s<mode>)
+       (*local_pic_load_u<mode>): Explicitly specify the mode iterator
+       referenced by <mode>, giving...
+       (*local_pic_load_s<SUBX:mode>, *local_pic_load_u<SUBX:mode>): ...these.
+       * config/riscv/riscv.md (*sge<u>_<X:mode><GPR:mode>)
+       (*slt<u>_<X:mode><GPR:mode>, *sle<u>_<X:mode><GPR:mode>): Explicitly
+       use <X:MODE> for the mode attribute.
+
 2019-07-07  Jeff Law  <law@redhat.com>
 
        PR tree-optimization/91090

diff --git a/gcc/config/riscv/pic.md b/gcc/config/riscv/pic.md
index da303e4c9ddb8c48a30ba7e635194ae09604a8a3..f16f0547dcd6b6e4d2b1d6b67b0f187c3646068a 100644 (file)
--- a/gcc/config/riscv/pic.md
+++ b/gcc/config/riscv/pic.md
@@ -29,14 +29,14 @@
   "<default_load>\t%0,%1"
   [(set (attr "length") (const_int 8))])
 
-(define_insn "*local_pic_load_s<mode>"
+(define_insn "*local_pic_load_s<SUBX:mode>"
   [(set (match_operand:SUPERQI 0 "register_operand" "=r")
        (sign_extend:SUPERQI (mem:SUBX (match_operand 1 "absolute_symbolic_operand" ""))))]
   "USE_LOAD_ADDRESS_MACRO (operands[1])"
   "<SUBX:load>\t%0,%1"
   [(set (attr "length") (const_int 8))])
 
-(define_insn "*local_pic_load_u<mode>"
+(define_insn "*local_pic_load_u<SUBX:mode>"
   [(set (match_operand:SUPERQI 0 "register_operand" "=r")
        (zero_extend:SUPERQI (mem:SUBX (match_operand 1 "absolute_symbolic_operand" ""))))]
   "USE_LOAD_ADDRESS_MACRO (operands[1])"

diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index 309c109db4c61df460a969d3e0bc3ee85eace3f8..0f4626656d60c1c9be76e8f56e09ac538dd445ad 100644 (file)
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -2054,7 +2054,7 @@
   ""
   "slt%i2<u>\t%0,zero,%1"
   [(set_attr "type" "slt")
-   (set_attr "mode" "<MODE>")])
+   (set_attr "mode" "<X:MODE>")])
 
 (define_insn "*slt<u>_<X:mode><GPR:mode>"
   [(set (match_operand:GPR           0 "register_operand" "= r")
@@ -2063,7 +2063,7 @@
   ""
   "slt%i2<u>\t%0,%1,%2"
   [(set_attr "type" "slt")
-   (set_attr "mode" "<MODE>")])
+   (set_attr "mode" "<X:MODE>")])
 
 (define_insn "*sle<u>_<X:mode><GPR:mode>"
   [(set (match_operand:GPR           0 "register_operand" "=r")
@@ -2075,7 +2075,7 @@
   return "slt%i2<u>\t%0,%1,%2";
 }
   [(set_attr "type" "slt")
-   (set_attr "mode" "<MODE>")])
+   (set_attr "mode" "<X:MODE>")])
 
 ;;
 ;;  ....................