Add i6400 entry to the MIPS CPU table.
authorAndrew Bennett <andrew.bennett@imgtec.com>
Thu, 12 Mar 2015 16:27:46 +0000 (16:27 +0000)
committerAndrew Bennett <andrew.bennett@imgtec.com>
Thu, 12 Mar 2015 16:37:09 +0000 (16:37 +0000)
gas/

* config/tc-mips.c (mips_cpu_info_table): Add i6400 entry.
* doc/c-mips.texi: Document i6400 -march option.

gas/ChangeLog
gas/config/tc-mips.c
gas/doc/c-mips.texi

index 36f0f32e33168dd3688d674e9c29ddbb317371ee..eef846c2aa69b0c78f7aa96e3006c3db265e758f 100644 (file)
@@ -1,3 +1,8 @@
+2015-03-12  Andrew Bennett  <andrew.bennett@imgtec.com>
+
+       * config/tc-mips.c (mips_cpu_info_table): Add i6400 entry.
+       * doc/c-mips.texi: Document i6400 -march option.
+
 2015-03-12  Nick Clifton  <nickc@redhat.com>
 
        PR gas/17444
index af184303f2883dafb8250742bd6b324b4ab4076a..e61bb4daab15e5a35d207f98a1a3f6bb80b4c26e 100644 (file)
@@ -18686,6 +18686,9 @@ static const struct mips_cpu_info mips_cpu_info_table[] =
      MIPS64R2 rather than MIPS64.  */
   { "xlp",           0, 0,                     ISA_MIPS64R2, CPU_XLR },
 
+  /* i6400.  */
+  { "i6400",         0, ASE_MSA,               ISA_MIPS64R6, CPU_MIPS64R6},
+
   /* End marker */
   { NULL, 0, 0, 0, 0 }
 };
index 1cee3a5d9a34bdd572a8515d4e595e78f21f95cb..f72db68a3726d25421c35ef967546b31f5f12bcf 100644 (file)
@@ -376,6 +376,7 @@ p5600,
 25kf,
 sb1,
 sb1a,
+i6400,
 loongson2e,
 loongson2f,
 loongson3a,