Update examples/cmos/counter.ys to use "synth" command
authorClifford Wolf <clifford@clifford.at>
Wed, 30 May 2018 12:17:36 +0000 (14:17 +0200)
committerClifford Wolf <clifford@clifford.at>
Wed, 30 May 2018 12:17:36 +0000 (14:17 +0200)
Signed-off-by: Clifford Wolf <clifford@clifford.at>
examples/cmos/counter.ys

index a784f3465c381d4116f969931e3a6d2db898f025..d0b093667ea96dff0b2c00b110a79539b31d3c18 100644 (file)
@@ -1,11 +1,12 @@
-
 read_verilog counter.v
 read_verilog -lib cmos_cells.v
 
-proc;; memory;; techmap;;
-
+synth
 dfflibmap -liberty cmos_cells.lib
-abc -liberty cmos_cells.lib;;
+abc -liberty cmos_cells.lib
+opt_clean
+
+stat -liberty cmos_cells.lib
 
 # http://vlsiarch.ecen.okstate.edu/flows/MOSIS_SCMOS/latest/cadence/lib/tsmc025/signalstorm/osu025_stdcells.lib
 # dfflibmap -liberty osu025_stdcells.lib
@@ -13,4 +14,3 @@ abc -liberty cmos_cells.lib;;
 
 write_verilog synth.v
 write_spice synth.sp
-