rs6000.md (stfiwx): Change constraint to 'wu' to prevent generation of 'stxsiwx'...

	* config/rs6000/rs6000.md (stfiwx): Change constraint to 'wu' to
	prevent generation of 'stxsiwx' on pre Power8 hardware.

From-SVN: r238223

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c17f388437892bb6e44d0b761b2cff483e16c2fd..f473b669c7e89f3797ed799a1c551ae41c071c29 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2016-07-11  Pat Haugen  <pthaugen@us.ibm.com>
+
+       PR target/71800
+       * config/rs6000/rs6000.md (stfiwx): Change constraint to 'wu' to
+       prevent generation of 'stxsiwx' on pre Power8 hardware.
+
 2016-07-11  David Malcolm  <dmalcolm@redhat.com>
 
        * input.c: Include cpplib.h.

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 5d212dd81808925c397e654cb8b6236c89a31b36..5afae92291c3b4bfa5235b43e2eda9b6a313c7d7 100644 (file)
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -5747,9 +5747,11 @@
 })
 
 ; An UNSPEC is used so we don't have to support SImode in FP registers.
+; The 'wu' constraint is used for the 2nd alternative to ensure stxsiwx
+; is only generated for Power8 or later.
 (define_insn "stfiwx"
   [(set (match_operand:SI 0 "memory_operand" "=Z,Z")
-       (unspec:SI [(match_operand:DI 1 "gpc_reg_operand" "d,wv")]
+       (unspec:SI [(match_operand:DI 1 "gpc_reg_operand" "d,wu")]
                   UNSPEC_STFIWX))]
   "TARGET_PPC_GFXOPT"
   "@