+2019-11-16 Richard Sandiford <richard.sandiford@arm.com>
+
+ * gcc.target/aarch64/sve/clastb_8.c: Use assembly tests to
+ check for fully-masked loops.
+
2019-11-16 Richard Sandiford <richard.sandiford@arm.com>
* gcc.target/aarch64/sve/reduc_3.c: Split multi-vector cases out
/* { dg-do assemble { target aarch64_asm_sve_ok } } */
-/* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-details -msve-vector-bits=256 --save-temps" } */
+/* { dg-options "-O2 -ftree-vectorize -msve-vector-bits=256 --save-temps" } */
#include <stdint.h>
TEST_TYPE (uint32_t);
TEST_TYPE (uint64_t);
-/* { dg-final { scan-tree-dump-times "using a fully-masked loop." 4 "vect" } } */
/* { dg-final { scan-assembler {\tclastb\t(b[0-9]+), p[0-7], \1, z[0-9]+\.b\n} } } */
/* { dg-final { scan-assembler {\tclastb\t(h[0-9]+), p[0-7], \1, z[0-9]+\.h\n} } } */
/* { dg-final { scan-assembler {\tclastb\t(s[0-9]+), p[0-7], \1, z[0-9]+\.s\n} } } */
/* { dg-final { scan-assembler {\tclastb\t(d[0-9]+), p[0-7], \1, z[0-9]+\.d\n} } } */
+/* { dg-final { scan-assembler {\twhilelo\tp[0-9]+\.b,} } } */
+/* { dg-final { scan-assembler {\twhilelo\tp[0-9]+\.h,} } } */
+/* { dg-final { scan-assembler {\twhilelo\tp[0-9]+\.s,} } } */
+/* { dg-final { scan-assembler {\twhilelo\tp[0-9]+\.d,} } } */