[(set (match_operand:SI 0 "register_operand" "=&r")
(ffs:SI (match_operand:SI 1 "register_operand" "r")))]
""
- "neg %0,%1\;and %0,%0,%1\;cntlz %0,%0\;{sfi|subfic} %0,%0,32"
+ "neg %0,%1\;and %0,%0,%1\;{cntlz|cntlzw} %0,%0\;{sfi|subfic} %0,%0,32"
[(set_attr "length" "16")])
(define_expand "mulsi3"
"TARGET_POWER"
"@
srea. %0,%1,%2
- srai. %0,%1,%h2"
+ {srai.|srawi.} %0,%1,%h2"
[(set_attr "type" "delayed_compare")])
(define_insn ""
(compare:CC (match_operand:SI 1 "gpc_reg_operand" "r")
(match_operand:SI 2 "reg_or_short_operand" "rI")))]
""
- "cmp%I2 %0,%1,%2"
+ "{cmp%I2|cmpw%I2} %0,%1,%2"
[(set_attr "type" "compare")])
;; If we are comparing a register for equality with a large constant,
(compare:CCUNS (match_operand:SI 1 "gpc_reg_operand" "r")
(match_operand:SI 2 "reg_or_u_short_operand" "rI")))]
""
- "cmpl%I2 %0,%1,%W2"
+ "{cmpl%I2|cmplw%I2} %0,%1,%W2"
[(set_attr "type" "compare")])
;; The following two insns don't exist as single insns, but if we provide
"TARGET_POWER"
"@
doz %3,%2,%1\;{sfi|subfic} %0,%3,0\;{ae|adde} %0,%0,%3
- {ai|addic} %0,%1,-1\;{aze|addze} %0,%0\;sri %0,%0,31"
+ {ai|addic} %0,%1,-1\;{aze|addze} %0,%0\;{sri|srwi} %0,%0,31"
[(set_attr "length" "12")])
(define_insn ""
"TARGET_POWER"
"@
doz %3,%2,%1\;{sfi|subfic} %0,%3,0\;{ae.|adde.} %0,%0,%3
- {ai|addic} %0,%1,-1\;{aze|addze} %0,%0\;sri. %0,%0,31"
+ {ai|addic} %0,%1,-1\;{aze|addze} %0,%0\;{sri.|srwi.} %0,%0,31"
[(set_attr "type" "delayed_compare,compare")
(set_attr "length" "12")])
(lt:SI (match_operand:SI 1 "gpc_reg_operand" "r")
(match_operand:SI 2 "reg_or_short_operand" "rI")))]
"TARGET_POWER"
- "doz%I2 %0,%1,%2\;nabs %0,%0\;sri %0,%0,31"
+ "doz%I2 %0,%1,%2\;nabs %0,%0\;{sri|srwi} %0,%0,31"
[(set_attr "length" "12")])
(define_insn ""
(set (match_operand:SI 0 "gpc_reg_operand" "=r")
(lt:SI (match_dup 1) (match_dup 2)))]
"TARGET_POWER"
- "doz%I2 %0,%1,%2\;nabs %0,%0\;sri. %0,%0,31"
+ "doz%I2 %0,%1,%2\;nabs %0,%0\;{sri.|srwi.} %0,%0,31"
[(set_attr "type" "delayed_compare")
(set_attr "length" "12")])