Use SimpleMemory instead of DDR3 so we can use the timing results in
tests. By using SimpleMemory, even if the DRAM timing changes the timing
of this test won't change. I expect the timing of SimpleMemory to never
change.
Change-Id: I4c75981d7b8bfc4dcca59e628e89f5a6ea4c0e36
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17871
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
wakeup_frequency = 10,
num_cpus = 2)
-# Create a DDR3 memory controller and connect it to the membus
-system.mem_ctrl = DDR3_1600_8x8()
+# Create a simple memory controller and connect it to the membus
+system.mem_ctrl = SimpleMemory(latency="50ns", bandwidth="0GB/s")
system.mem_ctrl.range = system.mem_ranges[0]
# Create the Ruby System