re PR target/25947 (Unrecognizable insn ICE for readline-5.1 in rl_vi_complete)

	PR target/25947
	* config/cris/cris.c (cris_order_for_addsi3): New function.
	* config/cris/cris-protos.h: Prototype it.
	* config/cris/cris.md (split for "move.S1 [rx=rx+i],ry")
	(split for "move.S1 ry,[rx=rx+i]", split for "clear.[bwd] [rx=rx+i]")
	(split for "mov(s|u).S1 [rx=rx+i],ry", split for "op.S1 [rx=rx+i],ry")
	(split for "op.S1 [rx=rx+i],ry (swapped)")
	(split for "op(s|u).S1 [rx=rx+i],ry")
	(split for "op(s|u).S1 [rx=rx+i],ry (swapped, plus or bound)"):
	Apply cris_order_for_addsi3 when generating addsi3 insns.

From-SVN: r110245

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 80c94b3cc86096923ef987d9f23cbae3ddfdae39..2f7e70663fd8710857160250a351db7df15a29be 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,16 @@
+2006-01-26  Hans-Peter Nilsson  <hp@axis.com>
+
+       PR target/25947
+       * config/cris/cris.c (cris_order_for_addsi3): New function.
+       * config/cris/cris-protos.h: Prototype it.
+       * config/cris/cris.md (split for "move.S1 [rx=rx+i],ry")
+       (split for "move.S1 ry,[rx=rx+i]", split for "clear.[bwd] [rx=rx+i]")
+       (split for "mov(s|u).S1 [rx=rx+i],ry", split for "op.S1 [rx=rx+i],ry")
+       (split for "op.S1 [rx=rx+i],ry (swapped)")
+       (split for "op(s|u).S1 [rx=rx+i],ry")
+       (split for "op(s|u).S1 [rx=rx+i],ry (swapped, plus or bound)"):
+       Apply cris_order_for_addsi3 when generating addsi3 insns.
+
 2006-01-25  Diego Novillo  <dnovillo@redhat.com>
 
        * tree.h (TREE_RANGE_CHECK): Fix range predicate.

diff --git a/gcc/config/cris/cris-protos.h b/gcc/config/cris/cris-protos.h
index 50673d9db33b2d3be111ce9a54cb42c20f468949..4fe7de004e404e93738d98e73ff32b42eb6c60a1 100644 (file)
--- a/gcc/config/cris/cris-protos.h
+++ b/gcc/config/cris/cris-protos.h
@@ -49,6 +49,7 @@ extern int cris_cfun_uses_pic_table (void);
 extern rtx cris_gen_movem_load (rtx, rtx, int);
 extern rtx cris_emit_movem_store (rtx, rtx, int, bool);
 extern void cris_expand_pic_call_address (rtx *);
+extern void cris_order_for_addsi3 (rtx *, int);
 #endif /* RTX_CODE */
 extern void cris_asm_output_label_ref (FILE *, char *);
 extern void cris_target_asm_named_section (const char *, unsigned int, tree);

diff --git a/gcc/config/cris/cris.c b/gcc/config/cris/cris.c
index 8271a4ff4a18e5bbc1dc8212b6ae360d6dcd4174..babeaa3ac6b3d69b966a27d3b17b46cdb7c4113e 100644 (file)
--- a/gcc/config/cris/cris.c
+++ b/gcc/config/cris/cris.c
@@ -3257,6 +3257,22 @@ cris_expand_pic_call_address (rtx *opp)
     }
 }
 
+/* Make sure operands are in the right order for an addsi3 insn as
+   generated by a define_split.  A MEM as the first operand isn't
+   recognized by addsi3 after reload.  OPERANDS contains the operands,
+   with the first at OPERANDS[N] and the second at OPERANDS[N+1].  */
+
+void
+cris_order_for_addsi3 (rtx *operands, int n)
+{
+  if (MEM_P (operands[n]))
+    {
+      rtx tem = operands[n];
+      operands[n] = operands[n + 1];
+      operands[n + 1] = tem;
+    }
+}
+
 /* Use from within code, from e.g. PRINT_OPERAND and
    PRINT_OPERAND_ADDRESS.  Macros used in output_addr_const need to emit
    different things depending on whether code operand or constant is

diff --git a/gcc/config/cris/cris.md b/gcc/config/cris/cris.md
index 9fcc4b01e4b6f8ab6dedb5a20eff240d959dcb57..1618887cd7a1cd88ddb88a9ca4527b007a8821d8 100644 (file)
--- a/gcc/config/cris/cris.md
+++ b/gcc/config/cris/cris.md
@@ -3285,7 +3285,10 @@
     || rtx_equal_p (operands[3], operands[2]))"
   [(set (match_dup 3) (plus:SI (match_dup 1) (match_dup 2)))
    (set (match_dup 0) (match_dup 4))]
-  "operands[4] = replace_equiv_address (operands[5], operands[3]);")
+{
+  operands[4] = replace_equiv_address (operands[5], operands[3]);
+  cris_order_for_addsi3 (operands, 1);
+})
 
 ;; move.S1 ry,[rx=rx+rz.S2]
 
@@ -3325,7 +3328,10 @@
     || rtx_equal_p (operands[3], operands[1]))"
   [(set (match_dup 3) (plus:SI (match_dup 0) (match_dup 1)))
    (set (match_dup 5) (match_dup 2))]
-  "operands[5] = replace_equiv_address (operands[6], operands[3]);")
+{
+  operands[5] = replace_equiv_address (operands[6], operands[3]);
+  cris_order_for_addsi3 (operands, 0);
+})
 
 ;; clear.[bwd] [rx=rx+rz.S2]
 
@@ -3362,7 +3368,7 @@
     || rtx_equal_p (operands[2], operands[1]))"
   [(set (match_dup 2) (plus:SI (match_dup 0) (match_dup 1)))
    (set (mem:BWD (match_dup 2)) (const_int 0))]
-  "")
+  "cris_order_for_addsi3 (operands, 0);")
 
 ;; mov(s|u).S1 [rx=rx+rz.S2],ry
 
@@ -3404,7 +3410,10 @@
     || rtx_equal_p (operands[2], operands[3]))"
   [(set (match_dup 3) (plus:SI (match_dup 1) (match_dup 2)))
    (set (match_dup 0) (match_op_dup 4 [(match_dup 5)]))]
-  "operands[5] = replace_equiv_address (XEXP (operands[4], 0), operands[3]);")
+{
+  operands[5] = replace_equiv_address (XEXP (operands[4], 0), operands[3]);
+  cris_order_for_addsi3 (operands, 1);
+})
 
 ;; op.S1 [rx=rx+i],ry
 
@@ -3424,7 +3433,10 @@
     || rtx_equal_p (operands[4], operands[3]))"
   [(set (match_dup 4) (plus:SI (match_dup 2) (match_dup 3)))
    (set (match_dup 0) (match_op_dup 5 [(match_dup 1) (match_dup 6)]))]
-  "operands[6] = replace_equiv_address (XEXP (operands[5], 1), operands[4]);")
+{
+  operands[6] = replace_equiv_address (XEXP (operands[5], 1), operands[4]);
+  cris_order_for_addsi3 (operands, 2);
+})
 
 ;; op.S1 [rx=rx+rz.S2],ry
 
@@ -3492,7 +3504,10 @@
     || rtx_equal_p (operands[4], operands[3]))"
   [(set (match_dup 4) (plus:SI (match_dup 2) (match_dup 3)))
    (set (match_dup 0) (match_op_dup 5 [(match_dup 6) (match_dup 1)]))]
-  "operands[6] = replace_equiv_address (XEXP (operands[5], 0), operands[4]);")
+{
+  operands[6] = replace_equiv_address (XEXP (operands[5], 0), operands[4]);
+  cris_order_for_addsi3 (operands, 2);
+})
 
 ;; op(s|u).S1 [rx=rx+rz.S2],ry
 
@@ -3543,9 +3558,12 @@
     || rtx_equal_p (operands[4], operands[3]))"
   [(set (match_dup 4) (plus:SI (match_dup 2) (match_dup 3)))
    (set (match_dup 0) (match_op_dup 5 [(match_dup 1) (match_dup 7)]))]
-  "operands[7] = gen_rtx_fmt_e (GET_CODE (operands[6]), GET_MODE (operands[6]),
-                               replace_equiv_address (XEXP (operands[6], 0),
-                                                      operands[4]));")
+{
+  operands[7] = gen_rtx_fmt_e (GET_CODE (operands[6]), GET_MODE (operands[6]),
+                              replace_equiv_address (XEXP (operands[6], 0),
+                                                     operands[4]));
+  cris_order_for_addsi3 (operands, 2);
+})
 
 ;; op(s|u).S1 [rx=rx+rz.S2],ry (swapped, plus or bound)
 
@@ -3594,9 +3612,12 @@
     || rtx_equal_p (operands[4], operands[3]))"
   [(set (match_dup 4) (plus:SI (match_dup 2) (match_dup 3)))
    (set (match_dup 0) (match_op_dup 6 [(match_dup 7) (match_dup 1)]))]
-  "operands[7] = gen_rtx_fmt_e (GET_CODE (operands[5]), GET_MODE (operands[5]),
-                               replace_equiv_address (XEXP (operands[5], 0),
-                                                      operands[4]));")
+{
+  operands[7] = gen_rtx_fmt_e (GET_CODE (operands[5]), GET_MODE (operands[5]),
+                              replace_equiv_address (XEXP (operands[5], 0),
+                                                     operands[4]));
+  cris_order_for_addsi3 (operands, 2);
+})
 \f
 ;; Splits for addressing prefixes that have no side-effects, so we can
 ;; fill a delay slot.  Never split if we lose something, though.