[Testsuite] Selectors and options directives for ARM VFP FP16 support.

gcc/
	* doc/sourcebuild.texi (Effective-Target keywords): Add entries
	for arm_fp16_ok and arm_fp16_hw.
	(Add Options): Add entries for arm_fp16, arm_fp16_ieee and
	arm_fp16_alternative.

testsuite/
	* lib/target-supports.exp (add_options_for arm_fp16): Reword
	comment.
	(add_options_for_arm_fp16_ieee): New.
	(add_options_for_arm_fp16_alternative): New.
	(effective_target_arm_fp16_ok_nocache): Add to comment.  Fix a
	long-line.
	(effective_target_arm_fp16_hw): New.

From-SVN: r237847

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 3900362650a767c4a862ec9aba8e78fa1551c268..cccf296932d18e6f14a8eeba8dfd61b6f6ea6db4 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2016-06-29  Matthew Wahab  <matthew.wahab@arm.com>
+
+       * doc/sourcebuild.texi (Effective-Target keywords): Add entries
+       for arm_fp16_ok and arm_fp16_hw.
+       (Add Options): Add entries for arm_fp16, arm_fp16_ieee and
+       arm_fp16_alternative.
+
 2016-06-29  Ilya Enkovich  <ilya.enkovich@intel.com>
 
        PR tree-optimization/71655

diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi
index 95a781d9202b808413e6e7726334ce487401bed0..23d3c3f0f547274e2d281ac5513a3509962062cc 100644 (file)
--- a/gcc/doc/sourcebuild.texi
+++ b/gcc/doc/sourcebuild.texi
@@ -1555,6 +1555,16 @@ options.  Some multilibs may be incompatible with these options.
 ARM Target supports @code{-mfpu=neon-vfpv4 -mfloat-abi=softfp} or compatible
 options.  Some multilibs may be incompatible with these options.
 
+@item arm_fp16_ok
+@anchor{arm_fp16_ok}
+Target supports options to generate VFP half-precision floating-point
+instructions.  Some multilibs may be incompatible with these
+options.  This test is valid for ARM only.
+
+@item arm_fp16_hw
+Target supports executing VFP half-precision floating-point
+instructions.  This test is valid for ARM only.
+
 @item arm_neon_fp16_ok
 @anchor{arm_neon_fp16_ok}
 ARM Target supports @code{-mfpu=neon-fp16 -mfloat-abi=softfp} or compatible
@@ -2075,6 +2085,28 @@ NEON support.  Only ARM targets support this feature, and only then
 in certain modes; see the @ref{arm_neon_ok,,arm_neon_ok effective target
 keyword}.
 
+@item arm_fp16
+VFP half-precision floating point support.  This does not select the
+FP16 format; for that, use @ref{arm_fp16_ieee,,arm_fp16_ieee} or
+@ref{arm_fp16_alternative,,arm_fp16_alternative} instead.  This
+feature is only supported by ARM targets and then only in certain
+modes; see the @ref{arm_fp16_ok,,arm_fp16_ok effective target
+keyword}.
+
+@item arm_fp16_ieee
+@anchor{arm_fp16_ieee}
+ARM IEEE 754-2008 format VFP half-precision floating point support.
+This feature is only supported by ARM targets and then only in certain
+modes; see the @ref{arm_fp16_ok,,arm_fp16_ok effective target
+keyword}.
+
+@item arm_fp16_alternative
+@anchor{arm_fp16_alternative}
+ARM Alternative format VFP half-precision floating point support.
+This feature is only supported by ARM targets and then only in certain
+modes; see the @ref{arm_fp16_ok,,arm_fp16_ok effective target
+keyword}.
+
 @item arm_neon_fp16
 NEON and half-precision floating point support.  Only ARM targets
 support this feature, and only then in certain modes; see

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 6801c5fb90621889854b9d39e6ce39e4dfb2a645..c51c1bcda58301112a994873db6878ff2844a446 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,13 @@
+2016-06-29  Matthew Wahab  <matthew.wahab@arm.com>
+
+       * lib/target-supports.exp (add_options_for_arm_fp16): Reword
+       comment.
+       (add_options_for_arm_fp16_ieee): New.
+       (add_options_for_arm_fp16_alternative): New.
+       (effective_target_arm_fp16_ok_nocache): Add to comment.  Fix a
+       long-line.
+       (effective_target_arm_fp16_hw): New.
+
 2016-06-29  Ilya Enkovich  <ilya.enkovich@intel.com>
 
        PR tree-optimization/71655

diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index de6c072fb0a2f60baa7ea1e4e84e309751ab83da..05ad5c1775cbd31816a88a1658fa652ad2d0f2ec 100644 (file)
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -3184,9 +3184,9 @@ proc check_effective_target_arm_neonv2_ok { } {
                check_effective_target_arm_neonv2_ok_nocache]
 }
 
-# Add the options needed for NEON.  We need either -mfloat-abi=softfp
-# or -mfloat-abi=hard, but if one is already specified by the
-# multilib, use it.
+# Add the options needed for VFP FP16 support.  We need either
+# -mfloat-abi=softfp or -mfloat-abi=hard.  If one is already specified by
+# the multilib, use it.
 
 proc add_options_for_arm_fp16 { flags } {
     if { ! [check_effective_target_arm_fp16_ok] } {
@@ -3196,9 +3196,32 @@ proc add_options_for_arm_fp16 { flags } {
     return "$flags $et_arm_fp16_flags"
 }
 
+# Add the options needed to enable support for IEEE format
+# half-precision support.  This is valid for ARM targets.
+
+proc add_options_for_arm_fp16_ieee { flags } {
+    if { ! [check_effective_target_arm_fp16_ok] } {
+       return "$flags"
+    }
+    global et_arm_fp16_flags
+    return "$flags $et_arm_fp16_flags -mfp16-format=ieee"
+}
+
+# Add the options needed to enable support for ARM Alternative format
+# half-precision support.  This is valid for ARM targets.
+
+proc add_options_for_arm_fp16_alternative { flags } {
+    if { ! [check_effective_target_arm_fp16_ok] } {
+       return "$flags"
+    }
+    global et_arm_fp16_flags
+    return "$flags $et_arm_fp16_flags -mfp16-format=alternative"
+}
+
 # Return 1 if this is an ARM target that can support a VFP fp16 variant.
 # Skip multilibs that are incompatible with these options and set
-# et_arm_fp16_flags to the best options to add.
+# et_arm_fp16_flags to the best options to add.  This test is valid for
+# ARM only.
 
 proc check_effective_target_arm_fp16_ok_nocache { } {
     global et_arm_fp16_flags
@@ -3206,7 +3229,10 @@ proc check_effective_target_arm_fp16_ok_nocache { } {
     if { ! [check_effective_target_arm32] } {
        return 0;
     }
-    if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" "-mfpu=*fpv[1-9][0-9]*" } ]] {
+    if [check-flags \
+           [list "" { *-*-* } { "-mfpu=*" } \
+                { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" \
+                      "-mfpu=*fpv[1-9][0-9]*" "-mfpu=*fp-armv8*" } ]] {
        # Multilib flags would override -mfpu.
        return 0
     }
@@ -3242,6 +3268,28 @@ proc check_effective_target_arm_fp16_ok { } {
                check_effective_target_arm_fp16_ok_nocache]
 }
 
+# Return 1 if the target supports executing VFP FP16 instructions, 0
+# otherwise.  This test is valid for ARM only.
+
+proc check_effective_target_arm_fp16_hw { } {
+    if {! [check_effective_target_arm_fp16_ok] } {
+       return 0
+    }
+    global et_arm_fp16_flags
+    check_runtime_nocache arm_fp16_hw {
+       int
+       main (int argc, char **argv)
+       {
+         __fp16 a = 1.0;
+         float r;
+         asm ("vcvtb.f32.f16 %0, %1"
+              : "=w" (r) : "w" (a)
+              : /* No clobbers.  */);
+         return (r == 1.0) ? 0 : 1;
+       }
+    } "$et_arm_fp16_flags -mfp16-format=ieee"
+}
+
 # Creates a series of routines that return 1 if the given architecture
 # can be selected and a routine to give the flags to select that architecture
 # Note: Extra flags may be added to disable options from newer compilers