freedreno: fix crash w/ masked non-SSA dst

Fixes
dEQP-GLES3.functional.shaders.indexing.varying_array.vec3_dynamic_write_dynamic_loop_read
regression.

Fixes: c1a27ba9baf freedreno/ir3: HIGH reg w/a for a6xx
Signed-off-by: Rob Clark <robdclark@gmail.com>

diff --git a/src/freedreno/ir3/ir3_context.c b/src/freedreno/ir3/ir3_context.c
index 1fc453c15b39f8ba03ce28004fdd74371807f5d9..d768c21e6f5f11f1ac9f3faa026224739f6340fa 100644 (file)
--- a/src/freedreno/ir3/ir3_context.c
+++ b/src/freedreno/ir3/ir3_context.c
@@ -251,6 +251,8 @@ put_dst(struct ir3_context *ctx, nir_dest *dst)
         * ir3_cp will clean up the extra mov:
         */
        for (unsigned i = 0; i < ctx->last_dst_n; i++) {
+               if (!ctx->last_dst[i])
+                       continue;
                if (ctx->last_dst[i]->regs[0]->flags & IR3_REG_HIGH) {
                        ctx->last_dst[i] = ir3_MOV(ctx->block, ctx->last_dst[i], TYPE_U32);
                }