case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
return 1;
+ /* nv35 capabilities */
+ case PIPE_CAP_DEPTH_BOUNDS_TEST:
+ return eng3d->oclass == NV35_3D_CLASS || eng3d->oclass >= NV40_3D_CLASS;
/* nv4x capabilities */
case PIPE_CAP_BLEND_EQUATION_SEPARATE:
case PIPE_CAP_NPOT_TEXTURES:
case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
- case PIPE_CAP_DEPTH_BOUNDS_TEST:
return 0;
case PIPE_CAP_VENDOR_ID:
nv30_zsa_state_create(struct pipe_context *pipe,
const struct pipe_depth_stencil_alpha_state *cso)
{
+ struct nouveau_object *eng3d = nv30_context(pipe)->screen->eng3d;
struct nv30_zsa_stateobj *so;
so = CALLOC_STRUCT(nv30_zsa_stateobj);
SB_DATA (so, cso->depth.writemask);
SB_DATA (so, cso->depth.enabled);
+ if (eng3d->oclass == NV35_3D_CLASS || eng3d->oclass >= NV40_3D_CLASS) {
+ SB_MTHD35(so, DEPTH_BOUNDS_TEST_ENABLE, 3);
+ SB_DATA (so, cso->depth.bounds_test);
+ SB_DATA (so, fui(cso->depth.bounds_min));
+ SB_DATA (so, fui(cso->depth.bounds_max));
+ }
+
if (cso->stencil[0].enabled) {
SB_MTHD30(so, STENCIL_ENABLE(0), 3);
SB_DATA (so, 1);
#define SB_DATA(so, u) (so)->data[(so)->size++] = (u)
#define SB_MTHD30(so, mthd, size) \
SB_DATA((so), ((size) << 18) | (7 << 13) | NV30_3D_##mthd)
+#define SB_MTHD35(so, mthd, size) \
+ SB_DATA((so), ((size) << 18) | (7 << 13) | NV35_3D_##mthd)
#define SB_MTHD40(so, mthd, size) \
SB_DATA((so), ((size) << 18) | (7 << 13) | NV40_3D_##mthd)
struct nv30_zsa_stateobj {
struct pipe_depth_stencil_alpha_state pipe;
- unsigned data[32];
+ unsigned data[36];
unsigned size;
};