}
}
+static bool has_syncobj(int fd)
+{
+ uint64_t value;
+ if (drmGetCap(fd, DRM_CAP_SYNCOBJ, &value))
+ return false;
+ return value ? true : false;
+}
+
bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
struct radeon_info *info,
struct amdgpu_gpu_info *amdinfo)
info->vce_fw_version =
vce.available_rings ? vce_version : 0;
info->has_userptr = true;
+ info->has_syncobj = has_syncobj(fd);
info->num_render_backends = amdinfo->rb_pipes;
info->clock_crystal_freq = amdinfo->gpu_counter_freq;
if (!info->clock_crystal_freq) {