i965: refactor sample mask calculation

Haswell needs a copy of the sample mask in 3DSTATE_PS; this makes that
convenient.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index 784cfbeb30b870931d3df46c3f7bcf6e81a21cb3..9d224987cc8a0c0c7e6e97a27c4646466e72dc27 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -1716,13 +1716,14 @@ brw_blorp_copytexsubimage(struct brw_context *brw,
                           int width, int height);
 
 /* gen6_multisample_state.c */
+unsigned
+gen6_determine_sample_mask(struct brw_context *brw);
+
 void
 gen6_emit_3dstate_multisample(struct brw_context *brw,
                               unsigned num_samples);
 void
-gen6_emit_3dstate_sample_mask(struct brw_context *brw,
-                              unsigned num_samples, float coverage,
-                              bool coverage_invert, unsigned sample_mask);
+gen6_emit_3dstate_sample_mask(struct brw_context *brw, unsigned mask);
 void
 gen6_get_sample_position(struct gl_context *ctx,
                          struct gl_framebuffer *fb,

diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp b/src/mesa/drivers/dri/i965/gen6_blorp.cpp
index bdb1d9ac107d319235dfc9f5f3a214196f305024..ce38b2dab3c21caa8b4787582204fe66e7f8e6a4 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen6_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/gen6_blorp.cpp
@@ -1035,7 +1035,7 @@ gen6_blorp_exec(struct brw_context *brw,
 
    uint32_t prog_offset = params->get_wm_prog(brw, &prog_data);
    gen6_emit_3dstate_multisample(brw, params->num_samples);
-   gen6_emit_3dstate_sample_mask(brw, params->num_samples, 1.0, false, ~0u);
+   gen6_emit_3dstate_sample_mask(brw, params->num_samples > 1 ? (1 << params->num_samples) - 1 : 1);
    gen6_blorp_emit_state_base_address(brw, params);
    gen6_blorp_emit_vertices(brw, params);
    gen6_blorp_emit_urb_config(brw, params);

diff --git a/src/mesa/drivers/dri/i965/gen6_multisample_state.c b/src/mesa/drivers/dri/i965/gen6_multisample_state.c
index 9f69ddc38bbb000002ce4493168d249584c25a40..2f2f575d043dfbcf667ac256e73e4a6342ed2db7 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen6_multisample_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_multisample_state.c
@@ -97,40 +97,16 @@ gen6_emit_3dstate_multisample(struct brw_context *brw,
 }
 
 
-/**
- * 3DSTATE_SAMPLE_MASK
- */
-void
-gen6_emit_3dstate_sample_mask(struct brw_context *brw,
-                              unsigned num_samples, float coverage,
-                              bool coverage_invert, unsigned sample_mask)
-{
-   BEGIN_BATCH(2);
-   OUT_BATCH(_3DSTATE_SAMPLE_MASK << 16 | (2 - 2));
-   if (num_samples > 1) {
-      int coverage_int = (int) (num_samples * coverage + 0.5);
-      uint32_t coverage_bits = (1 << coverage_int) - 1;
-      if (coverage_invert)
-         coverage_bits ^= (1 << num_samples) - 1;
-      OUT_BATCH(coverage_bits & sample_mask);
-   } else {
-      OUT_BATCH(1);
-   }
-   ADVANCE_BATCH();
-}
-
-
-static void upload_multisample_state(struct brw_context *brw)
+unsigned
+gen6_determine_sample_mask(struct brw_context *brw)
 {
    struct gl_context *ctx = &brw->ctx;
    float coverage = 1.0;
    float coverage_invert = false;
    unsigned sample_mask = ~0u;
 
-   /* _NEW_BUFFERS */
    unsigned num_samples = ctx->DrawBuffer->Visual.samples;
 
-   /* _NEW_MULTISAMPLE */
    if (ctx->Multisample._Enabled) {
       if (ctx->Multisample.SampleCoverage) {
          coverage = ctx->Multisample.SampleCoverageValue;
@@ -141,9 +117,40 @@ static void upload_multisample_state(struct brw_context *brw)
       }
    }
 
+   if (num_samples > 1) {
+      int coverage_int = (int) (num_samples * coverage + 0.5);
+      uint32_t coverage_bits = (1 << coverage_int) - 1;
+      if (coverage_invert)
+         coverage_bits ^= (1 << num_samples) - 1;
+      return coverage_bits & sample_mask;
+   } else {
+      return 1;
+   }
+}
+
+
+/**
+ * 3DSTATE_SAMPLE_MASK
+ */
+void
+gen6_emit_3dstate_sample_mask(struct brw_context *brw, unsigned mask)
+{
+   BEGIN_BATCH(2);
+   OUT_BATCH(_3DSTATE_SAMPLE_MASK << 16 | (2 - 2));
+   OUT_BATCH(mask);
+   ADVANCE_BATCH();
+}
+
+
+static void upload_multisample_state(struct brw_context *brw)
+{
+   struct gl_context *ctx = &brw->ctx;
+
+   /* _NEW_BUFFERS, _NEW_MULTISAMPLE */
+   unsigned num_samples = ctx->DrawBuffer->Visual.samples;
+
    gen6_emit_3dstate_multisample(brw, num_samples);
-   gen6_emit_3dstate_sample_mask(brw, num_samples, coverage,
-         coverage_invert, sample_mask);
+   gen6_emit_3dstate_sample_mask(brw, gen6_determine_sample_mask(brw));
 }
 
 

diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.cpp b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
index 3e97821ed6f358f6f95245abe46d858d23c452a9..1af869b6b87e369292651d88028b5c2e40ac4b9a 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen7_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
@@ -864,7 +864,7 @@ gen7_blorp_exec(struct brw_context *brw,
 
    uint32_t prog_offset = params->get_wm_prog(brw, &prog_data);
    gen6_emit_3dstate_multisample(brw, params->num_samples);
-   gen6_emit_3dstate_sample_mask(brw, params->num_samples, 1.0, false, ~0u);
+   gen6_emit_3dstate_sample_mask(brw, params->num_samples > 1 ? (1 << params->num_samples) - 1 : 1);
    gen6_blorp_emit_state_base_address(brw, params);
    gen6_blorp_emit_vertices(brw, params);
    gen7_blorp_emit_urb_config(brw, params);