midgard_instruction ins = {
.type = TAG_LOAD_STORE_4,
.mask = mask,
+ .dest_type = nir_type_uint32,
.dest = ~0,
.src = { ~0, ~0, ~0, ~0 },
.swizzle = SWIZZLE_IDENTITY_4,
if (is_store) {
ins.src[0] = srcdest;
+ ins.src_types[0] = nir_type_uint32;
/* Ensure we are tightly swizzled so liveness analysis is
* correct */
ld.load_store.arg_2 = 0x1E;
}
- for (unsigned c = 2; c < 16; ++c)
+ for (unsigned c = 4; c < 16; ++c)
ld.swizzle[0][c] = 0;
+
+ ld.dest_type = nir_type_float16;
}
emit_mir_instruction(ctx, ld);
.type = TAG_LOAD_STORE_4,
.mask = ins->mask,
.dest = to,
+ .dest_type = nir_type_float32,
.src = { frcp_from, ~0, ~0, ~0 },
+ .src_types = { nir_type_float32 },
.swizzle = SWIZZLE_IDENTITY_4,
.load_store = {
.op = frcp_component == COMPONENT_W ?
ins->alu.src1 = ins->alu.src2;
ins->alu.src2 = temp;
+ temp = ins->src_types[0];
+ ins->src_types[0] = ins->src_types[1];
+ ins->src_types[1] = temp;
+
unsigned temp_swizzle[16];
memcpy(temp_swizzle, ins->swizzle[0], sizeof(ins->swizzle[0]));
memcpy(ins->swizzle[0], ins->swizzle[1], sizeof(ins->swizzle[0]));