X86: Fix a number of places where the wrong form of a microop was used.

diff --git a/src/arch/x86/isa/insts/general_purpose/compare_and_test/bit_scan.py b/src/arch/x86/isa/insts/general_purpose/compare_and_test/bit_scan.py
index 22364e038da09f3b94c89856d7ceef3aa5aac366..da10d847881f9a6edd9c743335cf95c632b25f0c 100644 (file)
--- a/src/arch/x86/isa/insts/general_purpose/compare_and_test/bit_scan.py
+++ b/src/arch/x86/isa/insts/general_purpose/compare_and_test/bit_scan.py
@@ -84,7 +84,7 @@
 microcode = '''
 def macroop BSR_R_R {
     # Determine if the input was zero, and also move it to a temp reg.
-    movi t1, t1, t0, dataSize=8
+    mov t1, t1, t0, dataSize=8
     and t1, regm, regm, flags=(ZF,)
     br label("end"), flags=(CZF,)
 
@@ -132,7 +132,7 @@ end:
 
 def macroop BSR_R_M {
 
-    movi t1, t1, t0, dataSize=8
+    mov t1, t1, t0, dataSize=8
     ld t1, seg, sib, disp
 
     # Determine if the input was zero, and also move it to a temp reg.
@@ -184,7 +184,7 @@ end:
 def macroop BSR_R_P {
 
     rdip t7
-    movi t1, t1, t0, dataSize=8
+    mov t1, t1, t0, dataSize=8
     ld t1, seg, riprel, disp
 
     # Determine if the input was zero, and also move it to a temp reg.

diff --git a/src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py b/src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py
index 358fe43c84c363f8161682e1f35fe0d780281b4a..a9ad611b74698b75adf7f229fa09841f573cf8a4 100644 (file)
--- a/src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py
+++ b/src/arch/x86/isa/insts/general_purpose/control_transfer/interrupts_and_exceptions.py
@@ -143,7 +143,7 @@ processCSDescriptor:
     # appropriate/other RIP checks.
     # if temp_RIP > CS.limit throw #GP(0)
     rdlimit t6, cs, dataSize=8
-    subi t0, t1, t6, flags=(ECF,)
+    sub t0, t1, t6, flags=(ECF,)
     fault "new GeneralProtection(0)", flags=(CECF,)
 
     #(temp_CPL!=CPL)

diff --git a/src/arch/x86/isa/insts/general_purpose/control_transfer/jump.py b/src/arch/x86/isa/insts/general_purpose/control_transfer/jump.py
index 4f0cdf7709e3f16f8b19aba50b3433d891681adf..461861b0d56793d0af22a2472227f408626f053b 100644 (file)
--- a/src/arch/x86/isa/insts/general_purpose/control_transfer/jump.py
+++ b/src/arch/x86/isa/insts/general_purpose/control_transfer/jump.py
@@ -118,7 +118,7 @@ def macroop JMP_FAR_I
     limm t2, imm, dataSize=8
     # Figure out the width of the offset.
     limm t3, dsz, dataSize=8
-    sll t3, t3, 3, dataSize=8
+    slli t3, t3, 3, dataSize=8
     # Get the selector into t1.
     sll t1, t2, t3, dataSize=8
     mov t1, t0, t1, dataSize=2
@@ -178,7 +178,7 @@ def macroop JMP_FAR_REAL_I
     limm t2, imm, dataSize=8
     # Figure out the width of the offset.
     limm t3, dsz, dataSize=8
-    sll t3, t3, 3, dataSize=8
+    slli t3, t3, 3, dataSize=8
     # Get the selector into t1.
     sll t1, t2, t3, dataSize=8
     mov t1, t0, t1, dataSize=2

diff --git a/src/arch/x86/isa/insts/general_purpose/data_transfer/stack_operations.py b/src/arch/x86/isa/insts/general_purpose/data_transfer/stack_operations.py
index 82fdffc638e431916c79132e11cad8a0a4d13e9e..f4c8a4663872b736ee3e8e0e68bc574284bfd1e3 100644 (file)
--- a/src/arch/x86/isa/insts/general_purpose/data_transfer/stack_operations.py
+++ b/src/arch/x86/isa/insts/general_purpose/data_transfer/stack_operations.py
@@ -163,7 +163,7 @@ def macroop ENTER_I_I {
     # Pull the different components out of the immediate
     limm t1, imm
     zexti t2, t1, 15, dataSize=8
-    srl t1, t1, 16
+    srli t1, t1, 16
     zexti t1, t1, 5, dataSize=8
     # t1 is now the masked nesting level, and t2 is the amount of storage.
 
@@ -174,7 +174,7 @@ def macroop ENTER_I_I {
     mov t6, t6, rsp, dataSize=asz
 
     # If the nesting level is zero, skip all this stuff.
-    subi t0, t1, t0, flags=(EZF,), dataSize=2
+    sub t0, t1, t0, flags=(EZF,), dataSize=2
     br label("skipLoop"), flags=(CEZF,)
 
     # If the level was 1, only push the saved rbp

diff --git a/src/arch/x86/isa/insts/general_purpose/system_calls.py b/src/arch/x86/isa/insts/general_purpose/system_calls.py
index 9501116d906490bd46c9b80ec4bca44c7a7e9928..31184eae7e3a4fd82824026d4478a6c3536b74dc 100644 (file)
--- a/src/arch/x86/isa/insts/general_purpose/system_calls.py
+++ b/src/arch/x86/isa/insts/general_purpose/system_calls.py
@@ -65,7 +65,7 @@ def macroop SYSCALL_64
     # Stick rflags with RF masked into r11.
     rflags t2
     limm t3, "~RFBit", dataSize=8
-    andi r11, t2, t3, dataSize=8
+    and r11, t2, t3, dataSize=8
 
     rdval t3, star
     srli t3, t3, 32, dataSize=8
@@ -118,7 +118,7 @@ def macroop SYSCALL_COMPAT
     # Stick rflags with RF masked into r11.
     rflags t2
     limm t3, "~RFBit", dataSize=8
-    andi r11, t2, t3, dataSize=8
+    and r11, t2, t3, dataSize=8
 
     rdval t3, star
     srli t3, t3, 32, dataSize=8