r600: fix reloc setup

re-use the same reloc index for bos that are referenced
multiple times.

Fixes rain demo.

diff --git a/src/mesa/drivers/dri/r600/r600_cmdbuf.c b/src/mesa/drivers/dri/r600/r600_cmdbuf.c
index d2e75c011c2213f6bea05b69ac974287247d8905..8debecbab999d7e72bd3609af66b52283dfe6be1 100644 (file)
--- a/src/mesa/drivers/dri/r600/r600_cmdbuf.c
+++ b/src/mesa/drivers/dri/r600/r600_cmdbuf.c
@@ -247,50 +247,44 @@ static int r600_cs_process_relocs(struct radeon_cs *cs,
     csm = (struct r600_cs_manager_legacy*)cs->csm;
     relocs = (struct r600_cs_reloc_legacy *)cs->relocs;
 restart:
-    for (i = 0; i < cs->crelocs; i++) 
-    {
-        for (j = 0; j < relocs[i].cindices; j++) 
-        {
+    for (i = 0; i < cs->crelocs; i++) {
             uint32_t soffset, eoffset, asicoffset;
 
             r = radeon_bo_legacy_validate(relocs[i].base.bo,
-                                           &soffset, &eoffset);
-               if (r == -EAGAIN)
-            {
-                    goto restart;
+                                         &soffset, &eoffset);
+           if (r == -EAGAIN) {
+                   goto restart;
             }
-            if (r) 
-            {
-                fprintf(stderr, "validated %p [0x%08X, 0x%08X]\n",
-                        relocs[i].base.bo, soffset, eoffset);
-                return r;
+            if (r) {
+                   fprintf(stderr, "validated %p [0x%08X, 0x%08X]\n",
+                           relocs[i].base.bo, soffset, eoffset);
+                   return r;
             }
             asicoffset = soffset;
-            if (asicoffset >= eoffset) 
-            {
-             /*                radeon_bo_debug(relocs[i].base.bo, 12); */
-                fprintf(stderr, "validated %p [0x%08X, 0x%08X]\n",
-                        relocs[i].base.bo, soffset, eoffset);
-                fprintf(stderr, "above end: %p 0x%08X 0x%08X\n",
-                        relocs[i].base.bo,
-                        cs->packets[relocs[i].indices[j]],
-                        eoffset);
-                exit(0);
-                return -EINVAL;
-            }
 
-            /* pkt3 nop header in ib chunk */
-            cs->packets[relocs[i].reloc_indices[j]] = 0xC0001000;
-
-            /* reloc index in ib chunk */
-            cs->packets[relocs[i].reloc_indices[j] + 1] = offset_dw;
-
-            /* asic offset in reloc chunk */ /* see alex drm r600_nomm_relocate */
-            reloc_chunk[offset_dw] = asicoffset;
-            reloc_chunk[offset_dw + 3] = 0;
-
-            offset_dw += 4;
-        }
+           for (j = 0; j < relocs[i].cindices; j++) {
+                   if (asicoffset >= eoffset) {
+                           /*                radeon_bo_debug(relocs[i].base.bo, 12); */
+                           fprintf(stderr, "validated %p [0x%08X, 0x%08X]\n",
+                                   relocs[i].base.bo, soffset, eoffset);
+                           fprintf(stderr, "above end: %p 0x%08X 0x%08X\n",
+                                   relocs[i].base.bo,
+                                   cs->packets[relocs[i].indices[j]],
+                                   eoffset);
+                           exit(0);
+                           return -EINVAL;
+                   }
+                   /* pkt3 nop header in ib chunk */
+                   cs->packets[relocs[i].reloc_indices[j]] = 0xC0001000;
+                   /* reloc index in ib chunk */
+                   cs->packets[relocs[i].reloc_indices[j] + 1] = offset_dw;
+           }
+
+           /* asic offset in reloc chunk */ /* see alex drm r600_nomm_relocate */
+           reloc_chunk[offset_dw] = asicoffset;
+           reloc_chunk[offset_dw + 3] = 0;
+
+           offset_dw += 4;
     }
 
     *length_dw_reloc_chunk = offset_dw;