missing commas

diff --git a/src/decoder/power_decoder.py b/src/decoder/power_decoder.py
index 9a0ed278797f7e5c2824687890365d813f436621..8c03c4e4c0fd5d8c0213a5eabbada9cf26ffd82e 100644 (file)
--- a/src/decoder/power_decoder.py
+++ b/src/decoder/power_decoder.py
@@ -27,14 +27,14 @@ class PowerOp:
             row = {}
         res = [self.function_unit.eq(Function[row.get('unit', Function.NONE)]),
                self.internal_op.eq(InternalOp[row.get('internal op',
-                                                      InternalOp.OP_ILLEGAL)])
-               self.in1_sel.eq(In1Sel[row.get('in1', 0)])
-               self.in2_sel.eq(In2Sel[row.get('in2', 0)])
-               self.in3_sel.eq(In3Sel[row.get('in3', 0)])
-               self.out_sel.eq(OutSel[row.get('out', 0)])
-               self.ldst_len.eq(LdstLen[row.get('ldst len', 0)])
-               self.rc_sel.eq(RC[row.get('rc', 0)])
-               self.cry_in.eq(CryIn[row.get('cry in', 0)])
+                                                      InternalOp.OP_ILLEGAL)]),
+               self.in1_sel.eq(In1Sel[row.get('in1', 0)]),
+               self.in2_sel.eq(In2Sel[row.get('in2', 0)]),
+               self.in3_sel.eq(In3Sel[row.get('in3', 0)]),
+               self.out_sel.eq(OutSel[row.get('out', 0)]),
+               self.ldst_len.eq(LdstLen[row.get('ldst len', 0)]),
+               self.rc_sel.eq(RC[row.get('rc', 0)]),
+               self.cry_in.eq(CryIn[row.get('cry in', 0)]),
                ]
         for bit in single_bit_flags:
             sig = getattr(self, get_signal_name(bit))