+Fri Feb 13 17:11:22 1998 Michael Meissner <meissner@cygnus.com>
+
+ * misc.c (tic80_trace_fpu*): Pass address of sim_fpu structure,
+ not the structure itself. Use %g consistantly to print floating
+ point.
+
+ * cpu.h: (tic80_trace_fpu*): Update prototypes.
+
Tue Feb 3 16:25:47 1998 Andrew Cagney <cagney@b1.cygnus.com>
* alu.h (IMEM32, IMEM32_IMMED): Rename IMEM and IMEM_IMMED so that
extern char *tic80_trace_cmp PARAMS ((int, unsigned32, unsigned32, unsigned32));
extern char *tic80_trace_alu2 PARAMS ((int, unsigned32, unsigned32));
extern char *tic80_trace_shift PARAMS ((int, unsigned32, unsigned32, int, int, int, int, int));
-extern void tic80_trace_fpu3 PARAMS ((SIM_DESC, sim_cpu *, sim_cia, int, sim_fpu, sim_fpu, sim_fpu));
-extern void tic80_trace_fpu2 PARAMS ((SIM_DESC, sim_cpu *, sim_cia, int, sim_fpu, sim_fpu));
-extern void tic80_trace_fpu1 PARAMS ((SIM_DESC, sim_cpu *, sim_cia, int, sim_fpu));
-extern void tic80_trace_fpu2i PARAMS ((SIM_DESC, sim_cpu *, sim_cia, int, unsigned32, sim_fpu, sim_fpu));
-extern void tic80_trace_fpu2cmp PARAMS ((SIM_DESC, sim_cpu *, sim_cia, int, unsigned32, sim_fpu, sim_fpu));
+extern void tic80_trace_fpu3 PARAMS ((SIM_DESC, sim_cpu *, sim_cia, int, sim_fpu *, sim_fpu *, sim_fpu *));
+extern void tic80_trace_fpu2 PARAMS ((SIM_DESC, sim_cpu *, sim_cia, int, sim_fpu *, sim_fpu *));
+extern void tic80_trace_fpu1 PARAMS ((SIM_DESC, sim_cpu *, sim_cia, int, sim_fpu *));
+extern void tic80_trace_fpu2i PARAMS ((SIM_DESC, sim_cpu *, sim_cia, int, unsigned32, sim_fpu *, sim_fpu *));
+extern void tic80_trace_fpu2cmp PARAMS ((SIM_DESC, sim_cpu *, sim_cia, int, unsigned32, sim_fpu *, sim_fpu *));
extern char *tic80_trace_nop PARAMS ((int));
extern char *tic80_trace_sink1 PARAMS ((int, unsigned32));
extern char *tic80_trace_sink2 PARAMS ((int, unsigned32, unsigned32));
do { \
if (TRACE_FPU_P (CPU)) { \
tic80_trace_fpu3 (SD, CPU, cia, MY_INDEX, \
- result, input1, input2); \
+ &result, &input1, &input2); \
} \
} while (0)
do { \
if (TRACE_FPU_P (CPU)) { \
tic80_trace_fpu2 (SD, CPU, cia, MY_INDEX, \
- result, input); \
+ &result, &input); \
} \
} while (0)
do { \
if (TRACE_FPU_P (CPU)) { \
tic80_trace_fpu1 (SD, CPU, cia, MY_INDEX, \
- result); \
+ &result); \
} \
} while (0)
do { \
if (TRACE_FPU_P (CPU)) { \
tic80_trace_fpu2i (SD, CPU, cia, MY_INDEX, \
- result, input1, input2); \
+ result, &input1, &input2); \
} \
} while (0)
do { \
if (TRACE_FPU_P (CPU)) { \
tic80_trace_fpu2cmp (SD, CPU, cia, MY_INDEX, \
- result, input1, input2); \
+ result, &input1, &input2); \
} \
} while (0)
sim_cpu *cpu,
sim_cia cia,
int indx,
- sim_fpu result,
- sim_fpu input1,
- sim_fpu input2)
+ sim_fpu *result,
+ sim_fpu *input1,
+ sim_fpu *input2)
{
if (!tic80_size_name)
tic80_init_trace ();
itable[indx].file, itable[indx].line_nr, "fpu",
"%-*s %*g %*g => %*g",
tic80_size_name, itable[indx].name,
- SIZE_HEX + SIZE_DECIMAL + 3, sim_fpu_2d (&input1),
- SIZE_HEX + SIZE_DECIMAL + 3, sim_fpu_2d (&input2),
- SIZE_HEX + SIZE_DECIMAL + 3, sim_fpu_2d (&result));
+ SIZE_HEX + SIZE_DECIMAL + 3, sim_fpu_2d (input1),
+ SIZE_HEX + SIZE_DECIMAL + 3, sim_fpu_2d (input2),
+ SIZE_HEX + SIZE_DECIMAL + 3, sim_fpu_2d (result));
}
/* Trace the result of an FPU operation with 1 floating point input and a floating point output */
sim_cpu *cpu,
sim_cia cia,
int indx,
- sim_fpu result,
- sim_fpu input)
+ sim_fpu *result,
+ sim_fpu *input)
{
if (!tic80_size_name)
tic80_init_trace ();
itable[indx].file, itable[indx].line_nr, "fpu",
"%-*s %*g %-*s => %*g",
tic80_size_name, itable[indx].name,
- SIZE_HEX + SIZE_DECIMAL + 3, sim_fpu_2d (&input),
+ SIZE_HEX + SIZE_DECIMAL + 3, sim_fpu_2d (input),
SIZE_HEX + SIZE_DECIMAL + 3, "",
- SIZE_HEX + SIZE_DECIMAL, sim_fpu_2d (&result));
+ SIZE_HEX + SIZE_DECIMAL, sim_fpu_2d (result));
}
/* Trace the result of an FPU operation with 1 floating point input and a floating point output */
sim_cpu *cpu,
sim_cia cia,
int indx,
- sim_fpu result)
+ sim_fpu *result)
{
if (!tic80_size_name)
tic80_init_trace ();
tic80_size_name, itable[indx].name,
SIZE_HEX + SIZE_DECIMAL + 3, "",
SIZE_HEX + SIZE_DECIMAL + 3, "",
- SIZE_HEX + SIZE_DECIMAL, sim_fpu_2d (&result));
+ SIZE_HEX + SIZE_DECIMAL, sim_fpu_2d (result));
}
/* Trace the result of an FPU operation with 2 floating point inputs and an integer output */
sim_cia cia,
int indx,
unsigned32 result,
- sim_fpu input1,
- sim_fpu input2)
+ sim_fpu *input1,
+ sim_fpu *input2)
{
if (!tic80_size_name)
tic80_init_trace ();
trace_one_insn (sd, cpu, cia.ip, 1,
itable[indx].file, itable[indx].line_nr, "fpu",
- "%-*s %*f %*f => 0x%.*lx %-*ld",
+ "%-*s %*g %*g => 0x%.*lx %-*ld",
tic80_size_name, itable[indx].name,
- SIZE_HEX + SIZE_DECIMAL + 3, sim_fpu_2d (&input1),
- SIZE_HEX + SIZE_DECIMAL + 3, sim_fpu_2d (&input2),
+ SIZE_HEX + SIZE_DECIMAL + 3, sim_fpu_2d (input1),
+ SIZE_HEX + SIZE_DECIMAL + 3, sim_fpu_2d (input2),
SIZE_HEX, result, SIZE_DECIMAL, (long)(signed32)result);
}
sim_cia cia,
int indx,
unsigned32 result,
- sim_fpu input1,
- sim_fpu input2)
+ sim_fpu *input1,
+ sim_fpu *input2)
{
if (!tic80_size_name)
tic80_init_trace ();
trace_one_insn (sd, cpu, cia.ip, 1,
itable[indx].file, itable[indx].line_nr, "fpu",
- "%-*s %*f %*f => 0x%.*lx %s",
+ "%-*s %*g %*g => 0x%.*lx %s",
tic80_size_name, itable[indx].name,
- SIZE_HEX + SIZE_DECIMAL + 3, sim_fpu_2d (&input1),
- SIZE_HEX + SIZE_DECIMAL + 3, sim_fpu_2d (&input2),
+ SIZE_HEX + SIZE_DECIMAL + 3, sim_fpu_2d (input1),
+ SIZE_HEX + SIZE_DECIMAL + 3, sim_fpu_2d (input2),
SIZE_HEX, result, tic80_trace_cmp_internal (result));
}