* <https://dac.com/media-center/exhibitor-news/synopsys%E2%80%99-designware-universal-ddr-memory-controller-delivers-30-percent> 110nm DDR3 PHY
* <https://bitbucket.org/cfelton/minnesota> myhdl HDL cores
* B Extension proposal <https://groups.google.com/a/groups.riscv.org/forum/#!topic/isa-dev/zi_7B15kj6s>
-[[!tag cpus]]
+* Bit-extracts <https://github.com/cliffordwolf/bextdep>
+* Bit-reverse <http://programming.sirrida.de/bit_perm.html#general_reverse_bits>
+* Bit-permutations <http://programming.sirrida.de/bit_perm.html#c_e>
+>
+[[!tag cpus]]