i965: Drop i915 swtnl code.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

diff --git a/src/mesa/drivers/dri/i965/intel_context.c b/src/mesa/drivers/dri/i965/intel_context.c
index c7addfb19cd5bc1d0e764ab0d54b828e03e14c73..11092d5b2ea36c5f44f78a6dcbfad1b5593df1f7 100644 (file)
--- a/src/mesa/drivers/dri/i965/intel_context.c
+++ b/src/mesa/drivers/dri/i965/intel_context.c
@@ -616,8 +616,6 @@ intelInitContext(struct intel_context *intel,
    intel->hw_stencil = mesaVis->stencilBits && mesaVis->depthBits == 24;
    intel->hw_stipple = 1;
 
-   intel->RenderIndex = ~0;
-
    intelInitExtensions(ctx);
 
    INTEL_DEBUG = driParseDebugString(getenv("INTEL_DEBUG"), debug_control);
@@ -647,8 +645,6 @@ intelInitContext(struct intel_context *intel,
          intel->has_separate_stencil = false;
    }
 
-   intel->prim.primitive = ~0;
-
    if (driQueryOptionb(&intel->optionCache, "always_flush_batch")) {
       fprintf(stderr, "flushing batchbuffer before/after each draw call\n");
       intel->always_flush_batch = 1;
@@ -676,8 +672,6 @@ intelDestroyContext(__DRIcontext * driContextPriv)
 
    assert(intel);               /* should never be null */
    if (intel) {
-      INTEL_FIREVERTICES(intel);
-
       /* Dump a final BMP in case the application doesn't call SwapBuffers */
       if (INTEL_DEBUG & DEBUG_AUB) {
          intel_batchbuffer_flush(intel);
@@ -699,10 +693,6 @@ intelDestroyContext(__DRIcontext * driContextPriv)
 
       intel_batchbuffer_free(intel);
 
-      free(intel->prim.vb);
-      intel->prim.vb = NULL;
-      drm_intel_bo_unreference(intel->prim.vb_bo);
-      intel->prim.vb_bo = NULL;
       drm_intel_bo_unreference(intel->first_post_swapbuffers_batch);
       intel->first_post_swapbuffers_batch = NULL;
 
@@ -711,8 +701,6 @@ intelDestroyContext(__DRIcontext * driContextPriv)
       /* free the Mesa context */
       _mesa_free_context_data(&intel->ctx);
 
-      _math_matrix_dtr(&intel->ViewportMatrix);
-
       ralloc_free(intel);
       driContextPriv->driverPrivate = NULL;
    }

diff --git a/src/mesa/drivers/dri/i965/intel_context.h b/src/mesa/drivers/dri/i965/intel_context.h
index acb1e10710a6e787225eeedf9fd3936491c07204..76e8a4d8708a6691722b80cebdb5c27e6e41acba 100644 (file)
--- a/src/mesa/drivers/dri/i965/intel_context.h
+++ b/src/mesa/drivers/dri/i965/intel_context.h
@@ -214,7 +214,6 @@ struct intel_context
    drm_intel_bo *first_post_swapbuffers_batch;
    bool need_throttle;
    bool no_batch_wrap;
-   bool tnl_pipeline_running; /**< Set while i915's _tnl_run_pipeline. */
 
    /**
     * Set if we're either a debug context or the INTEL_DEBUG=perf environment
@@ -223,19 +222,6 @@ struct intel_context
     */
    bool perf_debug;
 
-   struct
-   {
-      GLuint id;
-      uint32_t start_ptr; /**< for i8xx */
-      uint32_t primitive;      /**< Current hardware primitive type */
-      void (*flush) (struct intel_context *);
-      drm_intel_bo *vb_bo;
-      uint8_t *vb;
-      unsigned int start_offset; /**< Byte offset of primitive sequence */
-      unsigned int current_offset; /**< Byte offset of next vertex */
-      unsigned int count;      /**< Number of vertices in current primitive */
-   } prim;
-
    struct {
       drm_intel_bo *bo;
       GLuint offset;
@@ -248,15 +234,6 @@ struct intel_context
 
    GLuint stats_wm;
 
-   /* Offsets of fields within the current vertex:
-    */
-   GLuint coloroffset;
-   GLuint specoffset;
-   GLuint wpos_offset;
-
-   struct tnl_attr_map vertex_attrs[VERT_ATTRIB_MAX];
-   GLuint vertex_attr_count;
-
    bool hw_stencil;
    bool hw_stipple;
    bool no_rast;
@@ -264,20 +241,7 @@ struct intel_context
    bool always_flush_cache;
    bool disable_throttling;
 
-   /* State for intelvb.c and inteltris.c.
-    */
-   GLuint RenderIndex;
-   GLmatrix ViewportMatrix;
-   GLenum render_primitive;
-   GLenum reduced_primitive; /*< Only gen < 6 */
-   GLuint vertex_size;
-   GLubyte *verts;              /* points to tnl->clipspace.vertex_buf */
-
-   /* Fallback rasterization functions 
-    */
-   intel_point_func draw_point;
-   intel_line_func draw_line;
-   intel_tri_func draw_tri;
+   GLenum reduced_primitive;
 
    /**
     * Set if rendering has occured to the drawable's front buffer.
@@ -347,12 +311,6 @@ S_FIXED(float value, uint32_t frac_bits)
    return value * (1 << frac_bits);
 }
 
-#define INTEL_FIREVERTICES(intel)              \
-do {                                           \
-   if ((intel)->prim.flush)                    \
-      (intel)->prim.flush(intel);              \
-} while (0)
-
 /* ================================================================
  * From linux kernel i386 header files, copes with odd sizes better
  * than COPY_DWORDS would:
@@ -485,7 +443,6 @@ extern bool intelInitContext(struct intel_context *intel,
                              unsigned *dri_ctx_error);
 
 extern void intelFinish(struct gl_context * ctx);
-extern void intel_flush_rendering_to_batch(struct gl_context *ctx);
 extern void _intel_flush(struct gl_context * ctx, const char *file, int line);
 
 #define intel_flush(ctx) _intel_flush(ctx, __FILE__, __LINE__)

diff --git a/src/mesa/drivers/dri/i965/intel_pixel_read.c b/src/mesa/drivers/dri/i965/intel_pixel_read.c
index 26eb4965b8dca2cb6e76550e4856c17139c47ef9..e9733a651c51a73fb9d67b7be1a846da0f58bbb2 100644 (file)
--- a/src/mesa/drivers/dri/i965/intel_pixel_read.c
+++ b/src/mesa/drivers/dri/i965/intel_pixel_read.c
@@ -167,8 +167,6 @@ intelReadPixels(struct gl_context * ctx,
    struct intel_context *intel = intel_context(ctx);
    bool dirty;
 
-   intel_flush_rendering_to_batch(ctx);
-
    DBG("%s\n", __FUNCTION__);
 
    if (_mesa_is_bufferobj(pack->BufferObj)) {