radeonsi: enable PIPE_CAP_FORCE_PERSAMPLE_INTERP

Now st/mesa won't generate 2 variants for this state.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index a784db624e3a6c84500012607de0e9a7ba0ab480..a0283b7c96605cc539e025d4785c2e37f8ae4c74 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -295,6 +295,7 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_TEXTURE_QUERY_LOD:
        case PIPE_CAP_TEXTURE_GATHER_SM5:
        case PIPE_CAP_TGSI_TXQS:
+       case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
                return 1;
 
        case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
@@ -336,7 +337,6 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
        case PIPE_CAP_SAMPLER_VIEW_TARGET:
        case PIPE_CAP_VERTEXID_NOBASE:
-       case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
                return 0;
 
        case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS: