Merge branch 'master' into wandwor

diff --cc frontends/ast/ast.cc
index 44b8863f963b5c208a81e17afde1cbe9941259ca,29e175c1580b9760938c2a7e0b67c6e5cefc6ef4..83993eea95958f20d3cd0242746d11d9abf13f16
--- 1/frontends/ast/ast.cc
--- 2/frontends/ast/ast.cc
+++ b/frontends/ast/ast.cc
@@@ -194,8 -194,7 +194,9 @@@ AstNode::AstNode(AstNodeType type, AstN
        is_logic = false;
        is_signed = false;
        is_string = false;
 +      is_wand = false;
 +      is_wor = false;
+       is_unsized = false;
        was_checked = false;
        range_valid = false;
        range_swapped = false;

diff --cc frontends/ast/ast.h
index 6c19dc7e61a4ade86f5c006608673030ee934e27,f90e683ad8c4b1b57b3e079047dca877b865961c..46d482f1a9b04fe30b8763af0efb9727ef4ec3d0
--- 1/frontends/ast/ast.h
--- 2/frontends/ast/ast.h
+++ b/frontends/ast/ast.h
@@@ -173,7 -173,7 +173,7 @@@ namespace AS
                // node content - most of it is unused in most node types
                std::string str;
                std::vector<RTLIL::State> bits;
-               bool is_input, is_output, is_reg, is_logic, is_signed, is_string, is_wand, is_wor, range_valid, range_swapped, was_checked;
 -              bool is_input, is_output, is_reg, is_logic, is_signed, is_string, range_valid, range_swapped, was_checked, is_unsized;
++              bool is_input, is_output, is_reg, is_logic, is_signed, is_string, is_wand, is_wor, range_valid, range_swapped, was_checked, is_unsized;
                int port_id, range_left, range_right;
                uint32_t integer;
                double realvalue;

diff --cc frontends/ast/genrtlil.cc
Simple merge

diff --cc frontends/verilog/verilog_lexer.l
Simple merge