simcells: Fix reset polarity for $_DLATCH_???_ cells.

diff --git a/techlibs/common/gen_fine_ffs.py b/techlibs/common/gen_fine_ffs.py
index e92d58f40efecdb5ae7de7aac108b502692c9676..5d331e7674601ef3d3b1b4c70ed17b16f3048f1a 100644 (file)
--- a/techlibs/common/gen_fine_ffs.py
+++ b/techlibs/common/gen_fine_ffs.py
@@ -300,7 +300,7 @@ module \$_DLATCH_{E:N|P}{R:N|P}{V:0|1}_ (E, R, D, Q);
 input E, R, D;
 output reg Q;
 always @* begin
-       if (R == {E:0|1})
+       if (R == {R:0|1})
                 Q <= {V:0|1};
        else if (E == {E:0|1})
                Q <= D;

diff --git a/techlibs/common/simcells.v b/techlibs/common/simcells.v
index 01b5bdfa69c20e51c7b7ecc0765ec190093f2f97..27ef442327cb47c813763d6aafb0dfb15e1bbec3 100644 (file)
--- a/techlibs/common/simcells.v
+++ b/techlibs/common/simcells.v
@@ -2986,7 +2986,7 @@ module \$_DLATCH_NP0_ (E, R, D, Q);
 input E, R, D;
 output reg Q;
 always @* begin
-       if (R == 0)
+       if (R == 1)
                 Q <= 0;
        else if (E == 0)
                Q <= D;
@@ -3009,7 +3009,7 @@ module \$_DLATCH_NP1_ (E, R, D, Q);
 input E, R, D;
 output reg Q;
 always @* begin
-       if (R == 0)
+       if (R == 1)
                 Q <= 1;
        else if (E == 0)
                Q <= D;
@@ -3032,7 +3032,7 @@ module \$_DLATCH_PN0_ (E, R, D, Q);
 input E, R, D;
 output reg Q;
 always @* begin
-       if (R == 1)
+       if (R == 0)
                 Q <= 0;
        else if (E == 1)
                Q <= D;
@@ -3055,7 +3055,7 @@ module \$_DLATCH_PN1_ (E, R, D, Q);
 input E, R, D;
 output reg Q;
 always @* begin
-       if (R == 1)
+       if (R == 0)
                 Q <= 1;
        else if (E == 1)
                Q <= D;