log(" write the design to the specified verilog file. Writing of an output\n");\r
log(" file is omitted if this parameter is not specified.\n");\r
log("\n");\r
- log(" -blif <file>\n");\r
- log(" write the design to the specified BLIF file. Writing of an output file\n");\r
- log(" is omitted if this parameter is not specified.\n");\r
- log("\n");\r
- log(" -edif <file>\n");\r
- log(" write the design to the specified EDIF file. Writing of an output file\n");\r
- log(" is omitted if this parameter is not specified.\n");\r
- log("\n");\r
log(" -json <file>\n");\r
log(" write the design to the specified JSON file. Writing of an output file\n");\r
log(" is omitted if this parameter is not specified.\n");\r
log(" do not use CC_MX{8,4} multiplexer cells in output netlist.\n");\r
log("\n");;\r
log(" -dff\n");\r
- log(" run 'abc'/'abc9' with -dff option\n");\r
+ log(" run 'abc' with -dff option\n");\r
log("\n");\r
log(" -retime\n");\r
log(" run 'abc' with '-dff -D 1' options\n");\r
log("\n");\r
}\r
\r
- string top_opt, vlog_file, blif_file, edif_file, json_file;\r
+ string top_opt, vlog_file, json_file;\r
bool noflatten, nobram, noaddf, nomult, nomx4, nomx8, dff, retime, noiopad, noclkbuf;\r
\r
void clear_flags() override\r
{\r
top_opt = "-auto-top";\r
vlog_file = "";\r
- blif_file = "";\r
- edif_file = "";\r
json_file = "";\r
noflatten = false;\r
nobram = false;\r
vlog_file = args[++argidx];\r
continue;\r
}\r
- if (args[argidx] == "-blif" && argidx+1 < args.size()) {\r
- blif_file = args[++argidx];\r
- continue;\r
- }\r
- if (args[argidx] == "-edif" && argidx+1 < args.size()) {\r
- edif_file = args[++argidx];\r
- continue;\r
- }\r
if (args[argidx] == "-json" && argidx+1 < args.size()) {\r
json_file = args[++argidx];\r
continue;\r
run("wreduce");\r
run("peepopt");\r
run("opt_clean");\r
+ run("muxpack");\r
run("share");\r
run("techmap -map +/cmp2lut.v -D LUT_WIDTH=4");\r
run("opt_expr");\r
run("opt_clean");\r
}\r
\r
- if (check_label("map_mult", "(skip if '-nomult')"))\r
+ if (check_label("map_mult", "(skip if '-nomult')") && !nomult)\r
{\r
- if (!nomult) {\r
- run("techmap -map +/gatemate/mul_map.v");\r
- }\r
+ run("techmap -map +/gatemate/mul_map.v");\r
}\r
\r
if (check_label("coarse"))\r
run("opt_clean");\r
}\r
\r
- if (check_label("map_bram", "(skip if '-nobram')"))\r
+ if (check_label("map_bram", "(skip if '-nobram')") && !nobram)\r
{\r
- if (!nobram) {\r
- run("memory_bram -rules +/gatemate/brams.txt");\r
- run("setundef -zero -params "\r
- "t:$__CC_BRAM_CASCADE "\r
- "t:$__CC_BRAM_40K_SDP t:$__CC_BRAM_20K_SDP "\r
- "t:$__CC_BRAM_20K_TDP t:$__CC_BRAM_40K_TDP "\r
- );\r
- run("techmap -map +/gatemate/brams_map.v");\r
- }\r
+ run("memory_bram -rules +/gatemate/brams.txt");\r
+ run("setundef -zero -params "\r
+ "t:$__CC_BRAM_CASCADE "\r
+ "t:$__CC_BRAM_40K_SDP t:$__CC_BRAM_20K_SDP "\r
+ "t:$__CC_BRAM_20K_TDP t:$__CC_BRAM_40K_TDP "\r
+ );\r
+ run("techmap -map +/gatemate/brams_map.v");\r
}\r
\r
if (check_label("map_ffram"))\r
}\r
}\r
\r
- if (check_label("map_io", "(skip if '-noiopad')"))\r
+ if (check_label("map_io", "(skip if '-noiopad')") && !noiopad)\r
{\r
- if (!noiopad) {\r
- run("iopadmap -bits "\r
- "-inpad CC_IBUF Y:I "\r
- "-outpad CC_OBUF A:O "\r
- "-toutpad $__toutpad OE:A:O "\r
- "-tinoutpad $__tinoutpad OE:Y:A:IO"\r
- );\r
- run("techmap -map +/gatemate/iob_map.v");\r
- run("clean");\r
- }\r
+ run("iopadmap -bits "\r
+ "-inpad CC_IBUF Y:I "\r
+ "-outpad CC_OBUF A:O "\r
+ "-toutpad $__toutpad OE:A:O "\r
+ "-tinoutpad $__tinoutpad OE:Y:A:IO"\r
+ );\r
+ run("techmap -map +/gatemate/iob_map.v");\r
+ run("clean");\r
}\r
\r
if (check_label("map_regs"))\r
\r
if (check_label("map_muxs"))\r
{\r
- run("abc -g simple"); // optimize design before muxcover\r
std::string muxcover_args;\r
if (!nomx4) {\r
muxcover_args += stringf(" -mux4");\r
run("clean");\r
}\r
\r
- if (check_label("map_bufg", "(skip if '-noclkbuf')"))\r
+ if (check_label("map_bufg", "(skip if '-noclkbuf')") && !noclkbuf)\r
{\r
- if (!noclkbuf) {\r
- run("clkbufmap -buf CC_BUFG O:I");\r
- run("clean");\r
- }\r
+ run("clkbufmap -buf CC_BUFG O:I");\r
+ run("clean");\r
}\r
\r
if (check_label("check"))\r
}\r
}\r
\r
- if (check_label("edif"))\r
- {\r
- if (!edif_file.empty() || help_mode) {\r
- run(stringf("write_edif %s", help_mode ? "<file-name>" : edif_file.c_str()));\r
- }\r
- }\r
-\r
if (check_label("json"))\r
{\r
if (!json_file.empty() || help_mode) {\r
run(stringf("write_json %s", help_mode ? "<file-name>" : json_file.c_str()));\r
}\r
}\r
-\r
- if (check_label("blif"))\r
- {\r
- if (!blif_file.empty() || help_mode) {\r
- run(stringf("write_blif %s", edif_file.c_str()));\r
- }\r
- }\r
}\r
} SynthGateMatePass;\r
\r
equiv_opt -assert -map +/gatemate/cells_sim.v synth_gatemate -noiopad # equivalency check
design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
cd mux4 # Constrain all select calls below inside the top module
-select -assert-count 1 t:CC_MX4
-select -assert-none t:CC_MX4 %% t:* %D
+select -assert-max 1 t:CC_LUT2
+select -assert-max 2 t:CC_LUT4
+select -assert-max 1 t:CC_MX2
+select -assert-none t:CC_LUT2 t:CC_LUT4 t:CC_MX2 %% t:* %D
design -load read
hierarchy -top mux8
equiv_opt -assert -map +/gatemate/cells_sim.v synth_gatemate -noiopad # equivalency check
design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
cd mux8 # Constrain all select calls below inside the top module
-select -assert-count 1 t:CC_MX8
-select -assert-none t:CC_MX8 %% t:* %D
+select -assert-max 1 t:CC_LUT3
+select -assert-max 5 t:CC_LUT4
+select -assert-max 1 t:CC_MX2
+select -assert-none t:CC_LUT3 t:CC_LUT4 t:CC_MX2 %% t:* %D