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i965: fix const register count for sandybridge
author
Zhenyu Wang
<zhenyuw@linux.intel.com>
Sun, 26 Sep 2010 05:13:32 +0000
(13:13 +0800)
committer
Zhenyu Wang
<zhenyuw@linux.intel.com>
Tue, 28 Sep 2010 07:58:20 +0000
(15:58 +0800)
Sandybridge's PS constant buffer payload size is decided from
push const buffer command, incorrect size would cause wrong data
in payload for position and vertex attributes. This fixes coefficients
for tex2d/tex3d.
src/mesa/drivers/dri/i965/brw_wm_glsl.c
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diff --git
a/src/mesa/drivers/dri/i965/brw_wm_glsl.c
b/src/mesa/drivers/dri/i965/brw_wm_glsl.c
index 1cbd5d2b55ac726a11cfacbc8f7fa68857950772..55aceea9b5c279f527c0c5fb11f72982b2d3bfbd 100644
(file)
--- a/
src/mesa/drivers/dri/i965/brw_wm_glsl.c
+++ b/
src/mesa/drivers/dri/i965/brw_wm_glsl.c
@@
-342,8
+342,8
@@
static void prealloc_reg(struct brw_wm_compile *c)
}
}
/* number of constant regs used (each reg is float[8]) */
-
c->nr_creg = 2 * ((4 * nr_params + 15) / 16)
;
-
reg_index += c->nr_creg;
+
c->nr_creg = ALIGN(nr_params, 2) / 2
;
+ reg_index += c->nr_creg;
}
}