#include "util/u_memory.h"
#include "util/u_math.h"
-#include "tgsi/tgsi_ureg.h"
-#include "tgsi/tgsi_ureg_parse.h"
+#include "tgsi/tgsi_parse.h"
#include "tgsi/tgsi_dump.h"
#include "tgsi/tgsi_info.h"
}
+
/**
* Preallocate GRF register before code emit.
* Do things as simply as possible. Allocate and populate all regs
* XXX this heuristic/check may need some fine tuning...
*/
if (c->vp->info.file_max[TGSI_FILE_CONSTANT] +
+ c->vp->info.file_max[TGSI_FILE_IMMEDIATE] +
c->vp->info.file_max[TGSI_FILE_TEMPORARY] + 21 > BRW_MAX_GRF)
c->vp->use_const_buffer = GL_TRUE;
- else
+ else {
+ /* XXX: immediates can go elsewhere if necessary:
+ */
+ assert(c->vp->info.file_max[TGSI_FILE_IMMEDIATE] +
+ c->vp->info.file_max[TGSI_FILE_TEMPORARY] + 21 > BRW_MAX_GRF);
+
c->vp->use_const_buffer = GL_FALSE;
+ }
/*printf("use_const_buffer = %d\n", c->vp->use_const_buffer);*/
if (c->nr_inputs == 0)
reg++;
+ /* Allocate a GRF and load immediate values by hand with 4 MOVs!!!
+ *
+ * XXX: Try to encode float immediates as brw immediates
+ * XXX: Put immediates into the CURBE.
+ * XXX: Make sure ureg sets minimal immediate size and respect it
+ * here.
+ */
+ for (i = 0; i < c->nr_immediates; i++) {
+ struct brw_reg r;
+ int j;
+
+ r = brw_vec8_grf(reg, 0);
+
+ for (j = 0; j < 4; j++) {
+ brw_MOV(&c->func,
+ brw_writemask(r, (1<<j)),
+ brw_imm_f(c->immediate[i][j]));
+ }
+
+ reg++;
+ }
+
+
/* Allocate outputs. The non-position outputs go straight into message regs.
*/
c->nr_outputs = 0;
static struct brw_reg
get_constant(struct brw_vs_compile *c,
- const struct ureg_instruction *inst,
- GLuint argIndex)
+ GLuint argIndex,
+ GLuint index,
+ GLboolean relAddr)
{
- const struct ureg_src src = inst->src[argIndex];
struct brw_compile *p = &c->func;
struct brw_reg const_reg;
struct brw_reg const2_reg;
- const GLboolean relAddr = src.Indirect;
assert(argIndex < 3);
- if (c->current_const[argIndex].index != src.Index || relAddr) {
+ if (c->current_const[argIndex].index != index || relAddr) {
struct brw_reg addrReg = c->regs[TGSI_FILE_ADDRESS][0];
- c->current_const[argIndex].index = src.Index;
+ c->current_const[argIndex].index = index;
#if 0
printf(" fetch const[%d] for arg %d into reg %d\n",
0, /* oword */
relAddr, /* relative indexing? */
addrReg, /* address register */
- 16 * src.Index, /* byte offset */
+ 16 * index, /* byte offset */
SURF_INDEX_VERT_CONST_BUFFER /* binding table index */
);
1, /* oword */
relAddr, /* relative indexing? */
addrReg, /* address register */
- 16 * src.Index, /* byte offset */
+ 16 * index, /* byte offset */
SURF_INDEX_VERT_CONST_BUFFER
);
}
*/
static struct brw_reg
get_src_reg( struct brw_vs_compile *c,
- const struct ureg_instruction *inst,
- GLuint argIndex )
+ GLuint argIndex,
+ GLuint file,
+ GLint index,
+ GLboolean relAddr )
{
- const GLuint file = inst->src[argIndex].File;
- const GLint index = inst->src[argIndex].Index;
- const GLboolean relAddr = inst->src[argIndex].Indirect;
switch (file) {
case TGSI_FILE_TEMPORARY:
return c->regs[file][index];
}
+ case TGSI_FILE_IMMEDIATE:
+ return c->regs[file][index];
+
case TGSI_FILE_CONSTANT:
if (c->vp->use_const_buffer) {
- return get_constant(c, inst, argIndex);
+ return get_constant(c, argIndex, index, relAddr);
}
else if (relAddr) {
return deref(c, c->regs[TGSI_FILE_CONSTANT][0], index);
* Return the brw reg for the given instruction's src argument.
*/
static struct brw_reg get_arg( struct brw_vs_compile *c,
- const struct ureg_instruction *inst,
+ const struct tgsi_full_src_register *src,
GLuint argIndex )
{
- const struct ureg_src src = inst->src[argIndex];
struct brw_reg reg;
- if (src.File == TGSI_FILE_NULL)
+ if (src->SrcRegister.File == TGSI_FILE_NULL)
return brw_null_reg();
- reg = get_src_reg(c, inst, argIndex);
+ reg = get_src_reg(c, argIndex,
+ src->SrcRegister.File,
+ src->SrcRegister.Index,
+ src->SrcRegister.Indirect);
/* Convert 3-bit swizzle to 2-bit.
*/
- reg.dw1.bits.swizzle = BRW_SWIZZLE4(src.SwizzleX,
- src.SwizzleY,
- src.SwizzleZ,
- src.SwizzleW);
+ reg.dw1.bits.swizzle = BRW_SWIZZLE4(src->SrcRegister.SwizzleX,
+ src->SrcRegister.SwizzleY,
+ src->SrcRegister.SwizzleZ,
+ src->SrcRegister.SwizzleW);
/* Note this is ok for non-swizzle instructions:
*/
- reg.negate = src.Negate ? 1 : 0;
+ reg.negate = src->SrcRegister.Negate ? 1 : 0;
+
+ /* XXX: abs, absneg
+ */
return reg;
}
* Get brw register for the given program dest register.
*/
static struct brw_reg get_dst( struct brw_vs_compile *c,
- struct ureg_dst dst )
+ unsigned file,
+ unsigned index,
+ unsigned writemask )
{
struct brw_reg reg;
- switch (dst.File) {
+ switch (file) {
case TGSI_FILE_TEMPORARY:
case TGSI_FILE_OUTPUT:
- assert(c->regs[dst.File][dst.Index].nr != 0);
- reg = c->regs[dst.File][dst.Index];
+ assert(c->regs[file][index].nr != 0);
+ reg = c->regs[file][index];
break;
case TGSI_FILE_ADDRESS:
- assert(dst.Index == 0);
- reg = c->regs[dst.File][dst.Index];
+ assert(index == 0);
+ reg = c->regs[file][index];
break;
case TGSI_FILE_NULL:
/* we may hit this for OPCODE_END, OPCODE_KIL, etc */
reg = brw_null_reg();
}
- reg.dw1.bits.writemask = dst.WriteMask;
+ reg.dw1.bits.writemask = writemask;
return reg;
}
}
static uint32_t
-get_predicate(const struct ureg_instruction *inst)
+get_predicate(const struct tgsi_full_instruction *inst)
{
/* XXX: disabling for now
*/
}
static void emit_insn(struct brw_vs_compile *c,
- const struct ureg_instruction *inst)
+ const struct tgsi_full_instruction *inst)
{
+ unsigned opcode = inst->Instruction.Opcode;
+ unsigned label = inst->InstructionExtLabel.Label;
struct brw_compile *p = &c->func;
struct brw_reg args[3], dst;
GLuint i;
/* Get argument regs.
*/
for (i = 0; i < 3; i++) {
- args[i] = get_arg(c, inst, i);
+ args[i] = get_arg(c, &inst->FullSrcRegisters[i], i);
}
/* Get dest regs. Note that it is possible for a reg to be both
* dst and arg, given the static allocation of registers. So
* care needs to be taken emitting multi-operation instructions.
*/
- dst = get_dst(c, inst->dst);
+ dst = get_dst(c,
+ inst->FullDstRegisters[0].DstRegister.File,
+ inst->FullDstRegisters[0].DstRegister.Index,
+ inst->FullDstRegisters[0].DstRegister.WriteMask);
- if (inst->dst.Saturate) {
+ /* XXX: saturate
+ */
+ if (inst->Instruction.Saturate != TGSI_SAT_NONE) {
debug_printf("Unsupported saturate in vertex shader");
}
- switch (inst->opcode) {
+ switch (opcode) {
case TGSI_OPCODE_ABS:
brw_MOV(p, dst, brw_abs(args[0]));
break;
brw_set_access_mode(p, BRW_ALIGN_16);
brw_ADD(p, get_addr_reg(c->stack_index),
get_addr_reg(c->stack_index), brw_imm_d(4));
- brw_save_call(p, inst->label, p->nr_insn);
+ brw_save_call(p, label, p->nr_insn);
brw_ADD(p, brw_ip_reg(), brw_ip_reg(), brw_imm_d(1*16));
break;
case TGSI_OPCODE_RET:
break;
default:
debug_printf("Unsupported opcode %i (%s) in vertex shader",
- inst->opcode,
- tgsi_get_opcode_name(inst->opcode));
+ opcode,
+ tgsi_get_opcode_name(opcode));
}
/* Set the predication update on the last instruction of the native
void brw_vs_emit(struct brw_vs_compile *c)
{
struct brw_compile *p = &c->func;
+ const struct tgsi_token *tokens = c->vp->tokens;
struct brw_instruction *end_inst, *last_inst;
- struct ureg_parse_context parse;
- struct ureg_declaration *decl;
- struct ureg_declaration *imm;
- struct ureg_declaration *insn;
+ struct tgsi_parse_context parse;
+ struct tgsi_full_instruction *inst;
+ boolean done = FALSE;
+ int i;
if (BRW_DEBUG & DEBUG_VS)
tgsi_dump(c->vp->tokens, 0);
brw_set_compression_control(p, BRW_COMPRESSION_NONE);
brw_set_access_mode(p, BRW_ALIGN_16);
+ /* Inputs */
+ tgsi_parse_init( &parse, tokens );
+ while( !tgsi_parse_end_of_tokens( &parse ) ) {
+ tgsi_parse_token( &parse );
+
+ switch( parse.FullToken.Token.Type ) {
+ case TGSI_TOKEN_TYPE_DECLARATION:
+ /* Nothing to do -- using info from tgsi_scan().
+ */
+ break;
+
+ case TGSI_TOKEN_TYPE_IMMEDIATE: {
+ static const float id[4] = {0,0,0,1};
+ const float *imm = &parse.FullToken.FullImmediate.u[i].Float;
+ unsigned size = parse.FullToken.FullImmediate.Immediate.NrTokens - 1;
+
+ for (i = 0; i < size; i++)
+ c->immediate[c->nr_immediates][i] = imm[i];
+
+ for ( ; i < 4; i++)
+ c->immediate[c->nr_immediates][i] = id[i];
+
+ c->nr_immediates++;
+ break;
+ }
+
+ case TGSI_TOKEN_TYPE_INSTRUCTION:
+ done = 1;
+ break;
+ }
+ }
+
/* Static register allocation
*/
brw_vs_alloc_regs(c);
brw_MOV(p, get_addr_reg(c->stack_index), brw_address(c->stack));
- while (ureg_next_decl(&parse, &decl)) {
- }
-
- while (ureg_next_immediate(&parse, &imm)) {
- }
-
- while (ureg_next_instruction(&parse, &insn)) {
+ /* Instructions
+ */
+ tgsi_parse_init( &parse, tokens );
+ while( !tgsi_parse_end_of_tokens( &parse ) ) {
+ tgsi_parse_token( &parse );
+
+ switch( parse.FullToken.Token.Type ) {
+ case TGSI_TOKEN_TYPE_DECLARATION:
+ case TGSI_TOKEN_TYPE_IMMEDIATE:
+ break;
+
+ case TGSI_TOKEN_TYPE_INSTRUCTION:
+ inst = &parse.FullToken.FullInstruction;
+ emit_insn( c, inst );
+ break;
+
+ default:
+ assert( 0 );
+ }
}
+ tgsi_parse_free( &parse );
- end_inst = &p->store[end_offset];
+ end_inst = &p->store[c->end_offset];
last_inst = &p->store[p->nr_insn];
/* The END instruction will be patched to jump to this code */
* Keith Whitwell <keith@tungstengraphics.com>
*/
+#include "util/u_math.h"
+#include "brw_debug.h"
#include "brw_context.h"
#include "brw_state.h"
#include "brw_defines.h"
/* BRW_NEW_NR_VS_SURFACES */
key->nr_surfaces = brw->vs.nr_surfaces;
- /* BRW_NEW_CURBE_OFFSETS, _NEW_TRANSFORM */
- if (ctx->Transform.ClipPlanesEnabled) {
+ /* PIPE_NEW_CLIP */
+ if (brw->curr.ucp.nr) {
/* Note that we read in the userclip planes as well, hence
* clip_start:
*/
memset(&vs, 0, sizeof(vs));
vs.thread0.kernel_start_pointer = brw->vs.prog_bo->offset >> 6; /* reloc */
- vs.thread0.grf_reg_count = ALIGN(key->total_grf, 16) / 16 - 1;
+ vs.thread0.grf_reg_count = align(key->total_grf, 16) / 16 - 1;
vs.thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754;
/* Choosing multiple program flow means that we may get 2-vertex threads,
* which will have the channel mask for dwords 4-7 enabled in the thread,
chipset_max_threads = 32;
else
chipset_max_threads = 16;
+
vs.thread4.max_threads = CLAMP(key->nr_urb_entries / 2,
1, chipset_max_threads) - 1;
NULL, NULL);
/* Emit VS program relocation */
- dri_bo_emit_reloc(bo,
- I915_GEM_DOMAIN_INSTRUCTION, 0,
- vs.thread0.grf_reg_count << 1,
- offsetof(struct brw_vs_unit_state, thread0),
- brw->vs.prog_bo);
+ brw->sws->bo_emit_reloc(bo,
+ I915_GEM_DOMAIN_INSTRUCTION, 0,
+ vs.thread0.grf_reg_count << 1,
+ offsetof(struct brw_vs_unit_state, thread0),
+ brw->vs.prog_bo);
return bo;
}
-static void prepare_vs_unit(struct brw_context *brw)
+static int prepare_vs_unit(struct brw_context *brw)
{
struct brw_vs_unit_key key;
if (brw->vs.state_bo == NULL) {
brw->vs.state_bo = vs_unit_create_from_key(brw, &key);
}
+
+ return 0;
}
const struct brw_tracked_state brw_vs_unit = {
.dirty = {
- .mesa = _NEW_TRANSFORM,
+ .mesa = (PIPE_NEW_CLIP),
.brw = (BRW_NEW_CURBE_OFFSETS |
BRW_NEW_NR_VS_SURFACES |
BRW_NEW_URB_FENCE),
#include "brw_context.h"
#include "brw_state.h"
#include "brw_defines.h"
+#include "brw_winsys.h"
+
+/* XXX: disabled true constant buffer functionality
+ */
+
/* Creates a new VS constant buffer reflecting the current VS program's
* constants, if needed by the VS program.
* Otherwise, constants go through the CURBEs using the brw_constant_buffer
* state atom.
*/
-static drm_intel_bo *
+#if 0
+static struct brw_winsys_buffer *
brw_vs_update_constant_buffer(struct brw_context *brw)
{
+ /* XXX: true constant buffers
+ */
struct brw_vertex_program *vp =
(struct brw_vertex_program *) brw->vertex_program;
const struct gl_program_parameter_list *params = vp->program.Base.Parameters;
return const_buffer;
}
+#endif
/**
* Update the surface state for a VS constant buffer.
*
* Sets brw->vs.surf_bo[surf] and brw->vp->const_buffer.
*/
+#if 0
static void
brw_update_vs_constant_surface( struct brw_context *brw,
GLuint surf)
{
- struct brw_context *brw = brw_context(ctx);
struct brw_surface_key key;
- struct brw_vertex_program *vp =
- (struct brw_vertex_program *) brw->vertex_program;
- const struct gl_program_parameter_list *params = vp->program.Base.Parameters;
+ struct pipe_buffer *cb = brw->curr.vs_constants;
assert(surf == 0);
brw->vs.surf_bo[surf] = brw_create_constant_surface(brw, &key);
}
}
+#endif
/**
static struct brw_winsys_buffer *
brw_vs_get_binding_table(struct brw_context *brw)
{
+#if 0
struct brw_winsys_buffer *bind_bo;
bind_bo = brw_search_cache(&brw->surface_cache, BRW_SS_SURF_BIND,
}
return bind_bo;
+#else
+ return NULL;
+#endif
}
/**
* to be updated, and produces BRW_NEW_NR_VS_SURFACES for the VS unit and
* CACHE_NEW_SURF_BIND for the binding table upload.
*/
-static void prepare_vs_surfaces(struct brw_context *brw )
+static int prepare_vs_surfaces(struct brw_context *brw )
{
+#if 0
int i;
int nr_surfaces = 0;
brw->state.dirty.brw |= BRW_NEW_NR_VS_SURFACES;
brw->vs.nr_surfaces = nr_surfaces;
}
+#endif
/* Note that we don't end up updating the bind_bo if we don't have a
* surface to be pointing at. This should be relatively harmless, as it
brw->sws->bo_unreference(brw->vs.bind_bo);
brw->vs.bind_bo = brw_vs_get_binding_table(brw);
}
+
+ return 0;
}
const struct brw_tracked_state brw_vs_surfaces = {
.dirty = {
- .mesa = (_NEW_PROGRAM_CONSTANTS),
- .brw = (BRW_NEW_VERTEX_PROGRAM),
+ .mesa = (PIPE_NEW_VERTEX_CONSTANTS |
+ PIPE_NEW_VERTEX_SHADER),
+ .brw = 0,
.cache = 0
},
.prepare = prepare_vs_surfaces,
projects / mesa.git / commitdiff