re PR target/70322 (STV doesn't optimize andn)

	PR target/70322
	* config/i386/i386.md (*andndi3_doubleword): Add non-BMI alternative
	and corresponding post-reload splitter.

testsuite/ChangeLog:

	PR target/70322
	* gcc.target/i386/pr70322-2.c (dg-final): Remove xfail.

From-SVN: r243202

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 7957649de9a28974457d48ec858b3495a8700e05..ee603c4a9d34c28d362070d000557e8cd3e23536 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2016-12-02  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR target/70322
+       * config/i386/i386.md (*andndi3_doubleword): Add non-BMI alternative
+       and corresponding post-reload splitter.
+
 2016-12-02  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 
        * config/aarch64/aarch64.h (machine_function): Add

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index da7cb07a0ef6349842df2c4ae99dc9179667d714..773f29be1009130a17cb3e6105645a8933add310 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -8534,15 +8534,24 @@
   operands[2] = gen_lowpart (QImode, operands[2]);
 })
 
-(define_insn_and_split "*andndi3_doubleword"
-  [(set (match_operand:DI 0 "register_operand" "=r")
+(define_insn "*andndi3_doubleword"
+  [(set (match_operand:DI 0 "register_operand" "=r,&r")
        (and:DI
-         (not:DI (match_operand:DI 1 "register_operand" "r"))
-         (match_operand:DI 2 "nonimmediate_operand" "rm")))
+         (not:DI (match_operand:DI 1 "register_operand" "r,0"))
+         (match_operand:DI 2 "nonimmediate_operand" "rm,rm")))
    (clobber (reg:CC FLAGS_REG))]
-  "TARGET_BMI && !TARGET_64BIT && TARGET_STV && TARGET_SSE2"
+  "!TARGET_64BIT && TARGET_STV && TARGET_SSE2"
   "#"
-  "&& reload_completed"
+  [(set_attr "isa" "bmi,*")])
+
+(define_split
+  [(set (match_operand:DI 0 "register_operand")
+       (and:DI
+         (not:DI (match_operand:DI 1 "register_operand"))
+         (match_operand:DI 2 "nonimmediate_operand")))
+   (clobber (reg:CC FLAGS_REG))]
+  "!TARGET_64BIT && TARGET_BMI && TARGET_STV && TARGET_SSE2
+   && reload_completed"
   [(parallel [(set (match_dup 0)
                   (and:SI (not:SI (match_dup 1)) (match_dup 2)))
              (clobber (reg:CC FLAGS_REG))])
@@ -8551,6 +8560,24 @@
              (clobber (reg:CC FLAGS_REG))])]
   "split_double_mode (DImode, &operands[0], 3, &operands[0], &operands[3]);")
 
+(define_split
+  [(set (match_operand:DI 0 "register_operand")
+       (and:DI
+         (not:DI (match_dup 0))
+         (match_operand:DI 1 "nonimmediate_operand")))
+   (clobber (reg:CC FLAGS_REG))]
+  "!TARGET_64BIT && !TARGET_BMI && TARGET_STV && TARGET_SSE2
+   && reload_completed"
+  [(set (match_dup 0) (not:SI (match_dup 0)))
+   (parallel [(set (match_dup 0)
+                  (and:SI (match_dup 0) (match_dup 1)))
+             (clobber (reg:CC FLAGS_REG))])
+   (set (match_dup 2) (not:SI (match_dup 2)))
+   (parallel [(set (match_dup 2)
+                  (and:SI (match_dup 2) (match_dup 3)))
+             (clobber (reg:CC FLAGS_REG))])]
+  "split_double_mode (DImode, &operands[0], 2, &operands[0], &operands[2]);")
+
 (define_insn "*andn<mode>_1"
   [(set (match_operand:SWI48 0 "register_operand" "=r,r")
        (and:SWI48
@@ -9312,6 +9339,12 @@
 \f
 ;; One complement instructions
 
+(define_expand "one_cmpl<mode>2"
+  [(set (match_operand:SWIM1248x 0 "nonimmediate_operand")
+       (not:SWIM1248x (match_operand:SWIM1248x 1 "nonimmediate_operand")))]
+  ""
+  "ix86_expand_unary_operator (NOT, <MODE>mode, operands); DONE;")
+
 (define_insn_and_split "*one_cmpldi2_doubleword"
   [(set (match_operand:DI 0 "nonimmediate_operand" "=rm")
        (not:DI (match_operand:DI 1 "nonimmediate_operand" "0")))]
@@ -9325,12 +9358,6 @@
        (not:SI (match_dup 3)))]
   "split_double_mode (DImode, &operands[0], 2, &operands[0], &operands[2]);")
 
-(define_expand "one_cmpl<mode>2"
-  [(set (match_operand:SWIM1248x 0 "nonimmediate_operand")
-       (not:SWIM1248x (match_operand:SWIM1248x 1 "nonimmediate_operand")))]
-  ""
-  "ix86_expand_unary_operator (NOT, <MODE>mode, operands); DONE;")
-
 (define_insn "*one_cmpl<mode>2_1"
   [(set (match_operand:SWI248 0 "nonimmediate_operand" "=rm")
        (not:SWI248 (match_operand:SWI248 1 "nonimmediate_operand" "0")))]

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index d7b90d65f8e628a034b036ab580218c1bef5534c..261731c54b0d5b9a9dccab96d0d79dea3221a0a9 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2016-12-02  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR target/70322
+       * gcc.target/i386/pr70322-2.c (dg-final): Remove xfail.
+
 2016-12-02  Steven G. Kargl  <kargl@gcc.gnu.org>
 
        PR fortran/78618

diff --git a/gcc/testsuite/gcc.target/i386/pr70322-2.c b/gcc/testsuite/gcc.target/i386/pr70322-2.c
index 7c5d0be1e310697755ea7535b889d20f05257858..a683b6dd275397d39d1c17d759dadf36369ef404 100644 (file)
--- a/gcc/testsuite/gcc.target/i386/pr70322-2.c
+++ b/gcc/testsuite/gcc.target/i386/pr70322-2.c
@@ -1,7 +1,7 @@
 /* PR target/70322 */
 /* { dg-do compile { target ia32 } } */
 /* { dg-options "-O2 -msse2 -mstv -mno-bmi" } */
-/* { dg-final { scan-assembler "pandn" { xfail *-*-* } } } */
+/* { dg-final { scan-assembler "pandn" } } */
 
 extern long long z;