using namespace std;
AlphaConsole::AlphaConsole(const string &name, SimConsole *cons,
- SimpleDisk *d, int size, System *system,
+ SimpleDisk *d, System *system,
BaseCPU *cpu, TsunamiIO *clock, int num_cpus,
- Addr addr, Addr mask, MemoryController *mmu)
- : MmapDevice(name, addr, mask, mmu), disk(d), console(cons)
+ Addr a, MemoryController *mmu)
+ : FunctionalMemory(name), disk(d), console(cons), addr(a)
{
mmu->add_child(this, Range<Addr>(addr, addr + size));
CREATE_SIM_OBJECT(AlphaConsole)
{
return new AlphaConsole(getInstanceName(), sim_console, disk,
- system, cpu, clock, num_cpus, mmu, addr);
+ system, cpu, clock, num_cpus, addr, mmu);
}
REGISTER_SIM_OBJECT("AlphaConsole", AlphaConsole)
public:
/** Standard Constructor */
AlphaConsole(const std::string &name, SimConsole *cons,
- SimpleDisk *d, int size,
- System *system, BaseCPU *cpu,
+ SimpleDisk *d, System *system, BaseCPU *cpu,
TsunamiIO *clock, int num_cpus,
- Addr addr, Addr mask, MemoryController *mmu);
+ Addr a, MemoryController *mmu);
/**
* memory mapped reads and writes
using namespace std;
-BadDevice::BadDevice(const string &name,
- Addr addr, Addr mask, MemoryController *mmu, const string &devicename)
- : MmapDevice(name, addr, mask, mmu), devname(devicename)
+BadDevice::BadDevice(const string &name, Addr a, MemoryController *mmu,
+ const string &devicename)
+ : FunctionalMemory(name), addr(a), devname(devicename)
{
+ mmu->add_child(this, Range<Addr>(addr, addr + size));
}
Fault
SimObjectParam<MemoryController *> mmu;
Param<Addr> addr;
- Param<Addr> mask;
Param<string> devicename;
END_DECLARE_SIM_OBJECT_PARAMS(BadDevice)
INIT_PARAM(mmu, "Memory Controller"),
INIT_PARAM(addr, "Device Address"),
- INIT_PARAM(mask, "Address Mask"),
INIT_PARAM(devicename, "Name of device to error on")
END_INIT_SIM_OBJECT_PARAMS(BadDevice)
CREATE_SIM_OBJECT(BadDevice)
{
- return new BadDevice(getInstanceName(), addr, mask, mmu, devicename);
+ return new BadDevice(getInstanceName(), addr, mmu, devicename);
}
REGISTER_SIM_OBJECT("BadDevice", BadDevice)
#ifndef __BADDEV_HH__
#define __BADDEV_HH__
-#include "mem/functional_mem/mmap_device.hh"
+#include "mem/functional_mem/functional_memory.hh"
/**
* BadDevice
* the user that the kernel they are running has unsupported
* options (i.e. frame buffer)
*/
-class BadDevice : public MmapDevice
+class BadDevice : public FunctionalMemory
{
private:
+ Addr addr;
+ static const Addr size = 0xf;
- std::string devname;
- protected:
+ std::string devname;
public:
/**
- * The default constructor.
- */
- BadDevice(const std::string &name, Addr addr, Addr mask,
- MemoryController *mmu, const std::string &devicename);
+ * The default constructor.
+ */
+ BadDevice(const std::string &name, Addr a, MemoryController *mmu,
+ const std::string &devicename);
virtual Fault read(MemReqPtr &req, uint8_t *data);
virtual Fault write(MemReqPtr &req, const uint8_t *data);
-
-
};
#endif // __BADDEV_HH__
using namespace std;
-PCIConfigAll::PCIConfigAll(const string &name, Tsunami *t,
- Addr addr, Addr mask, MemoryController *mmu)
- : MmapDevice(name, addr, mask, mmu), tsunami(t)
+PCIConfigAll::PCIConfigAll(const string &name, Tsunami *t, Addr a,
+ MemoryController *mmu)
+ : FunctionalMemory(name), addr(a), tsunami(t)
{
+ mmu->add_child(this, Range<Addr>(addr, addr + size));
+
// Put back pointer in tsunami
tsunami->pciconfig = this;
DPRINTF(PCIConfigAll, "read va=%#x size=%d\n",
req->vaddr, req->size);
- Addr daddr = (req->paddr & addr_mask);
+ Addr daddr = (req->paddr & size);
int device = (daddr >> 11) & 0x1F;
int func = (daddr >> 8) & 0x7;
Fault
PCIConfigAll::write(MemReqPtr &req, const uint8_t *data)
{
- Addr daddr = (req->paddr & addr_mask);
+ Addr daddr = (req->paddr & size);
int device = (daddr >> 11) & 0x1F;
int func = (daddr >> 8) & 0x7;
CREATE_SIM_OBJECT(PCIConfigAll)
{
- return new PCIConfigAll(getInstanceName(), tsunami, addr, mask, mmu);
+ return new PCIConfigAll(getInstanceName(), tsunami, addr, mmu);
}
REGISTER_SIM_OBJECT("PCIConfigAll", PCIConfigAll)
#ifndef __PCICONFIGALL_HH__
#define __PCICONFIGALL_HH__
-#include "mem/functional_mem/mmap_device.hh"
+#include "mem/functional_mem/functional_memory.hh"
#include "dev/tsunami.hh"
#include "dev/pcireg.h"
* space and passes the requests on to TsunamiPCIDev devices as
* appropriate.
*/
-class PCIConfigAll : public MmapDevice
+class PCIConfigAll : public FunctionalMemory
{
private:
+ Addr addr;
+ static const Addr size = 0xffffff;
protected:
/**
* The default constructor.
*/
- PCIConfigAll(const std::string &name, Tsunami *t,
- Addr addr, Addr mask, MemoryController *mmu);
+ PCIConfigAll(const std::string &name, Tsunami *t, Addr a,
+ MemoryController *mmu);
virtual Fault read(MemReqPtr &req, uint8_t *data);
virtual Fault write(MemReqPtr &req, const uint8_t *data);
PciDev::PciDev(const string &name, MemoryController *mmu, PCIConfigAll *cf,
PciConfigData *cd, uint32_t bus, uint32_t dev, uint32_t func)
- : MmapDevice(name), MMU(mmu), ConfigSpace(cf), ConfigData(cd),
+ : FunctionalMemory(name), MMU(mmu), ConfigSpace(cf), ConfigData(cd),
Bus(bus), Device(dev), Function(func)
{
// copy the config data from the PciConfigData object
(config.data[offset] & 0x3);
if (word_value & ~0x1) {
+ Addr base_addr = (word_value & ~0x1) + TSUNAMI_PCI0_IO;
+ Addr base_size = BARSize[barnum]-1;
+
// It's never been set
if (BARAddrs[barnum] == 0)
- AddMapping((word_value & ~0x1) + TSUNAMI_PCI0_IO,
- BARSize[barnum]-1, MMU);
+ MMU->add_child(this,
+ Range<Addr>(base_addr,
+ base_addr + base_size));
else
- ChangeMapping(BARAddrs[barnum], BARSize[barnum]-1,
- (word_value & ~0x1) + TSUNAMI_PCI0_IO,
- BARSize[barnum]-1, MMU);
- BARAddrs[barnum] = (word_value & ~0x1) + TSUNAMI_PCI0_IO;
+ MMU->update_child(this,
+ Range<Addr>(BARAddrs[barnum],
+ BARAddrs[barnum] +
+ base_size),
+ Range<Addr>(base_addr,
+ base_addr +
+ base_size));
+
+ BARAddrs[barnum] = base_addr;
}
} else {
(config.data[offset] & 0xF);
if (word_value & ~0x3) {
+ Addr base_addr = (word_value & ~0x3) +
+ TSUNAMI_PCI0_MEMORY;
+
+ Addr base_size = BARSize[barnum]-1;
+
// It's never been set
if (BARAddrs[barnum] == 0)
- AddMapping((word_value & ~0x3) + TSUNAMI_PCI0_MEMORY,
- BARSize[barnum]-1, MMU);
+ MMU->add_child(this,
+ Range<Addr>(base_addr,
+ base_addr + base_size));
else
- ChangeMapping(BARAddrs[barnum], BARSize[barnum]-1,
- (word_value & ~0x3) +
- TSUNAMI_PCI0_MEMORY,
- BARSize[barnum]-1, MMU);
- BARAddrs[barnum] = (word_value & ~0x3) +
- TSUNAMI_PCI0_MEMORY;
+ MMU->update_child(this,
+ Range<Addr>(BARAddrs[barnum],
+ BARAddrs[barnum] +
+ base_size),
+ Range<Addr>(base_addr,
+ base_addr +
+ base_size));
+
+ BARAddrs[barnum] = base_addr;
}
}
}
#include "dev/pcireg.h"
#include "sim/sim_object.hh"
-#include "mem/functional_mem/mmap_device.hh"
+#include "mem/functional_mem/functional_memory.hh"
class PCIConfigAll;
class MemoryController;
* register with it. This object registers with the PCIConfig space
* object.
*/
-class PciDev : public MmapDevice
+class PciDev : public FunctionalMemory
{
protected:
MemoryController *MMU;
using namespace std;
-TsunamiCChip::TsunamiCChip(const string &name, Tsunami *t,
- Addr addr, Addr mask, MemoryController *mmu)
- : MmapDevice(name, addr, mask, mmu), tsunami(t)
+TsunamiCChip::TsunamiCChip(const string &name, Tsunami *t, Addr a,
+ MemoryController *mmu)
+ : FunctionalMemory(name), addr(a), tsunami(t)
{
+ mmu->add_child(this, Range<Addr>(addr, addr + size));
+
for(int i=0; i < Tsunami::Max_CPUs; i++) {
dim[i] = 0;
dir[i] = 0;
DPRINTF(Tsunami, "read va=%#x size=%d\n",
req->vaddr, req->size);
- Addr daddr = (req->paddr & addr_mask) >> 6;
+ Addr daddr = (req->paddr & size) >> 6;
ExecContext *xc = req->xc;
switch (req->size) {
DPRINTF(Tsunami, "write - va=%#x size=%d \n",
req->vaddr, req->size);
- Addr daddr = (req->paddr & addr_mask) >> 6;
+ Addr daddr = (req->paddr & size) >> 6;
switch (req->size) {
SimObjectParam<Tsunami *> tsunami;
SimObjectParam<MemoryController *> mmu;
Param<Addr> addr;
- Param<Addr> mask;
END_DECLARE_SIM_OBJECT_PARAMS(TsunamiCChip)
INIT_PARAM(tsunami, "Tsunami"),
INIT_PARAM(mmu, "Memory Controller"),
- INIT_PARAM(addr, "Device Address"),
- INIT_PARAM(mask, "Address Mask")
+ INIT_PARAM(addr, "Device Address")
END_INIT_SIM_OBJECT_PARAMS(TsunamiCChip)
CREATE_SIM_OBJECT(TsunamiCChip)
{
- return new TsunamiCChip(getInstanceName(), tsunami, addr, mask, mmu);
+ return new TsunamiCChip(getInstanceName(), tsunami, addr, mmu);
}
REGISTER_SIM_OBJECT("TsunamiCChip", TsunamiCChip)
#ifndef __TSUNAMI_CCHIP_HH__
#define __TSUNAMI_CCHIP_HH__
-#include "mem/functional_mem/mmap_device.hh"
+#include "mem/functional_mem/functional_memory.hh"
#include "dev/tsunami.hh"
/*
* Tsunami CChip
*/
-class TsunamiCChip : public MmapDevice
+class TsunamiCChip : public FunctionalMemory
{
- public:
+ private:
+ Addr addr;
+ static const Addr size = 0xfff;
protected:
/**
uint64_t drir;
public:
- TsunamiCChip(const std::string &name, Tsunami *t,
- Addr addr, Addr mask, MemoryController *mmu);
+ TsunamiCChip(const std::string &name, Tsunami *t, Addr a,
+ MemoryController *mmu);
virtual Fault read(MemReqPtr &req, uint8_t *data);
virtual Fault write(MemReqPtr &req, const uint8_t *data);
}
TsunamiIO::TsunamiIO(const string &name, Tsunami *t, time_t init_time,
- Addr addr, Addr mask, MemoryController *mmu)
- : MmapDevice(name, addr, mask, mmu), tsunami(t), rtc(t)
+ Addr a, MemoryController *mmu)
+ : FunctionalMemory(name), addr(a), tsunami(t), rtc(t)
{
+ mmu->add_child(this, Range<Addr>(addr, addr + size));
+
// set the back pointer from tsunami to myself
tsunami->io = this;
DPRINTF(Tsunami, "io read va=%#x size=%d IOPorrt=%#x\n",
req->vaddr, req->size, req->vaddr & 0xfff);
- Addr daddr = (req->paddr & addr_mask);
+ Addr daddr = (req->paddr & size);
// ExecContext *xc = req->xc;
// int cpuid = xc->cpu_id;
DPRINTF(Tsunami, "io write - va=%#x size=%d IOPort=%#x Data=%#x\n",
req->vaddr, req->size, req->vaddr & 0xfff, dt64);
- Addr daddr = (req->paddr & addr_mask);
+ Addr daddr = (req->paddr & size);
switch(req->size) {
case sizeof(uint8_t):
Param<time_t> time;
SimObjectParam<MemoryController *> mmu;
Param<Addr> addr;
- Param<Addr> mask;
END_DECLARE_SIM_OBJECT_PARAMS(TsunamiIO)
INIT_PARAM_DFLT(time, "System time to use "
"(0 for actual time, default is 1/1/06", ULL(1136073600)),
INIT_PARAM(mmu, "Memory Controller"),
- INIT_PARAM(addr, "Device Address"),
- INIT_PARAM(mask, "Address Mask")
+ INIT_PARAM(addr, "Device Address")
END_INIT_SIM_OBJECT_PARAMS(TsunamiIO)
CREATE_SIM_OBJECT(TsunamiIO)
{
- return new TsunamiIO(getInstanceName(), tsunami, time, addr,
- mask, mmu);
+ return new TsunamiIO(getInstanceName(), tsunami, time, addr, mmu);
}
REGISTER_SIM_OBJECT("TsunamiIO", TsunamiIO)
#define RTC_RATE 1024
-#include "mem/functional_mem/mmap_device.hh"
+#include "mem/functional_mem/functional_memory.hh"
#include "dev/tsunami.hh"
/*
* Tsunami I/O device
*/
-class TsunamiIO : public MmapDevice
+class TsunamiIO : public FunctionalMemory
{
-
private:
+ Addr addr;
+ static const Addr size = 0xff;
+
struct tm tm;
// In Tsunami RTC only has two i/o ports
uint32_t frequency() const { return RTC_RATE; }
TsunamiIO(const std::string &name, Tsunami *t, time_t init_time,
- Addr addr, Addr mask, MemoryController *mmu);
+ Addr a, MemoryController *mmu);
void set_time(time_t t);
using namespace std;
-TsunamiPChip::TsunamiPChip(const string &name, Tsunami *t,
- Addr addr, Addr mask, MemoryController *mmu)
- : MmapDevice(name, addr, mask, mmu), tsunami(t)
+TsunamiPChip::TsunamiPChip(const string &name, Tsunami *t, Addr a,
+ MemoryController *mmu)
+ : FunctionalMemory(name), addr(a), tsunami(t)
{
+ mmu->add_child(this, Range<Addr>(addr, addr + size));
+
wsba0 = 0;
wsba1 = 0;
wsba2 = 0;
DPRINTF(Tsunami, "read va=%#x size=%d\n",
req->vaddr, req->size);
- Addr daddr = (req->paddr & addr_mask) >> 6;
+ Addr daddr = (req->paddr & size) >> 6;
// ExecContext *xc = req->xc;
// int cpuid = xc->cpu_id;
DPRINTF(Tsunami, "write - va=%#x size=%d \n",
req->vaddr, req->size);
- Addr daddr = (req->paddr & addr_mask) >> 6;
+ Addr daddr = (req->paddr & size) >> 6;
switch (req->size) {
SimObjectParam<Tsunami *> tsunami;
SimObjectParam<MemoryController *> mmu;
Param<Addr> addr;
- Param<Addr> mask;
END_DECLARE_SIM_OBJECT_PARAMS(TsunamiPChip)
INIT_PARAM(tsunami, "Tsunami"),
INIT_PARAM(mmu, "Memory Controller"),
- INIT_PARAM(addr, "Device Address"),
- INIT_PARAM(mask, "Address Mask")
+ INIT_PARAM(addr, "Device Address")
END_INIT_SIM_OBJECT_PARAMS(TsunamiPChip)
CREATE_SIM_OBJECT(TsunamiPChip)
{
- return new TsunamiPChip(getInstanceName(), tsunami, addr, mask, mmu);
+ return new TsunamiPChip(getInstanceName(), tsunami, addr, mmu);
}
REGISTER_SIM_OBJECT("TsunamiPChip", TsunamiPChip)
#ifndef __TSUNAMI_PCHIP_HH__
#define __TSUNAMI_PCHIP_HH__
-#include "mem/functional_mem/mmap_device.hh"
+#include "mem/functional_mem/functional_memory.hh"
#include "dev/tsunami.hh"
/*
* Tsunami PChip
*/
-class TsunamiPChip : public MmapDevice
+class TsunamiPChip : public FunctionalMemory
{
- public:
+ private:
+ Addr addr;
+ static const Addr size = 0xfff;
protected:
Tsunami *tsunami;
public:
- TsunamiPChip(const std::string &name, Tsunami *t,
- Addr addr, Addr mask, MemoryController *mmu);
+ TsunamiPChip(const std::string &name, Tsunami *t, Addr a,
+ MemoryController *mmu);
virtual Fault read(MemReqPtr &req, uint8_t *data);
virtual Fault write(MemReqPtr &req, const uint8_t *data);
#define CONS_INT_TX 0x01 // interrupt enable / state bits
#define CONS_INT_RX 0x02
-TsunamiUart::TsunamiUart(const string &name, SimConsole *c,
- Addr addr, Addr mask, MemoryController *mmu)
- : MmapDevice(name, addr, mask, mmu),
- cons(c), status_store(0), valid_char(false)
+TsunamiUart::TsunamiUart(const string &name, SimConsole *c, Addr a,
+ MemoryController *mmu)
+ : FunctionalMemory(name), addr(a), cons(c), status_store(0),
+ valid_char(false)
{
IER = 0;
}
Fault
TsunamiUart::read(MemReqPtr &req, uint8_t *data)
{
- Addr daddr = req->paddr & addr_mask;
+ Addr daddr = req->paddr & size;
DPRINTF(TsunamiUart, " read register %#x\n", daddr);
switch (req->size) {
Fault
TsunamiUart::write(MemReqPtr &req, const uint8_t *data)
{
- Addr daddr = req->paddr & addr_mask;
+ Addr daddr = req->paddr & size;
DPRINTF(TsunamiUart, " write register %#x value %#x\n", daddr, *(uint8_t*)data);
switch (daddr) {
SimObjectParam<SimConsole *> console;
SimObjectParam<MemoryController *> mmu;
Param<Addr> addr;
- Param<Addr> mask;
END_DECLARE_SIM_OBJECT_PARAMS(TsunamiUart)
INIT_PARAM(console, "The console"),
INIT_PARAM(mmu, "Memory Controller"),
- INIT_PARAM(addr, "Device Address"),
- INIT_PARAM(mask, "Address Mask")
+ INIT_PARAM(addr, "Device Address")
END_INIT_SIM_OBJECT_PARAMS(TsunamiUart)
CREATE_SIM_OBJECT(TsunamiUart)
{
- return new TsunamiUart(getInstanceName(), console, addr, mask, mmu);
+ return new TsunamiUart(getInstanceName(), console, addr, mmu);
}
REGISTER_SIM_OBJECT("TsunamiUart", TsunamiUart)
#ifndef __TSUNAMI_UART_HH__
#define __TSUNAMI_UART_HH__
-#include "mem/functional_mem/mmap_device.hh"
+#include "mem/functional_mem/functional_memory.hh"
class SimConsole;
/*
* Tsunami UART
*/
-class TsunamiUart : public MmapDevice
+class TsunamiUart : public FunctionalMemory
{
+ private:
+ Addr addr;
+ static const Addr size = 0xf;
+
protected:
SimConsole *cons;
int status_store;
uint8_t IER;
public:
- TsunamiUart(const std::string &name, SimConsole *c,
- Addr addr, Addr mask, MemoryController *mmu);
+ TsunamiUart(const std::string &name, SimConsole *c, Addr a,
+ MemoryController *mmu);
Fault read(MemReqPtr &req, uint8_t *data);
Fault write(MemReqPtr &req, const uint8_t *data);