Properly create and use a bfd_arch_info_type for 32-bit tilegx.

bfd/
	* arctures.c (bfd_architecture): Define bfd_mach_tilegx32.
	* bfd-in2.h: Regenerate.
	* cpu-tilegx.c (bfd_tilegx32_arch): define.
	  (bfd_tilegx_arch): link to bfd_tilegx32_arch.

gas/
	* tc-tilegx.c (md_begin): set architecture and machine.

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index cf9bf17b3231601a58db4b3c66341197d4ae8297..2568c32b0d1dfc0cfd1f2d04d84f573fbbe9258f 100644 (file)
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,10 @@
+2012-02-25  Walter Lee  <walt@tilera.com>
+
+       * arctures.c (bfd_architecture): Define bfd_mach_tilegx32.
+       * bfd-in2.h: Regenerate.
+       * cpu-tilegx.c (bfd_tilegx32_arch): define.
+         (bfd_tilegx_arch): link to bfd_tilegx32_arch.
+
 2012-02-24  Nick Clifton  <nickc@redhat.com>
 
        PR ld/13730

diff --git a/bfd/archures.c b/bfd/archures.c
index c833cbfec66572c9d838484fbab613a4c394163b..92c4867af51a64e0d32ca6414b21cebcba72c593 100644 (file)
--- a/bfd/archures.c
+++ b/bfd/archures.c
@@ -453,6 +453,7 @@ DESCRIPTION
 .  bfd_arch_tilegx, {* Tilera TILE-Gx *}
 .#define bfd_mach_tilepro   1
 .#define bfd_mach_tilegx    1
+.#define bfd_mach_tilegx32  2
 .  bfd_arch_last
 .  };
 */

diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index fb563374d3343759191c1819bc3bd2ae7962f74e..4a92e47ef91cb044a382b7984349168e8c190550 100644 (file)
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -2159,6 +2159,7 @@ enum bfd_architecture
   bfd_arch_tilegx, /* Tilera TILE-Gx */
 #define bfd_mach_tilepro   1
 #define bfd_mach_tilegx    1
+#define bfd_mach_tilegx32  2
   bfd_arch_last
   };
 

diff --git a/bfd/cpu-tilegx.c b/bfd/cpu-tilegx.c
index dc9bc63cd4d5b1131253ec2cf3f3b21acc752d76..f98cb0c4675230b6b9b09bd3fedf110c94d4e00a 100644 (file)
--- a/bfd/cpu-tilegx.c
+++ b/bfd/cpu-tilegx.c
@@ -22,6 +22,23 @@
 #include "sysdep.h"
 #include "libbfd.h"
 
+const bfd_arch_info_type bfd_tilegx32_arch =
+  {
+    32, /* 32 bits in a word */
+    32, /* 32 bits in an address */
+    8,  /* 8 bits in a byte */
+    bfd_arch_tilegx,
+    bfd_mach_tilegx32,
+    "tilegx32",
+    "tilegx32",
+    3,
+    FALSE,
+    bfd_default_compatible,
+    bfd_default_scan,
+    bfd_arch_default_fill,
+    0,
+  };
+
 const bfd_arch_info_type bfd_tilegx_arch =
   {
     64, /* 64 bits in a word */
@@ -36,5 +53,5 @@ const bfd_arch_info_type bfd_tilegx_arch =
     bfd_default_compatible,
     bfd_default_scan,
     bfd_arch_default_fill,
-    0,
+    &bfd_tilegx32_arch,
   };

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 6293433edc3b3895bd66d3dc1ed88a61ecfb7708..dda0c1a4ec14685b8b044797349f6101c19f255b 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,7 @@
+2012-02-25  Walter Lee  <walt@tilera.com>
+
+       * tc-tilegx.c (md_begin): set architecture and machine.
+
 2012-02-21  H.J. Lu  <hongjiu.lu@intel.com>
 
        * config/tc-i386.c (check_hle): Use HLEPrefixNone, HLEPrefixLock,

diff --git a/gas/config/tc-tilegx.c b/gas/config/tc-tilegx.c
index 39e1907322d237baa4dfcf76ba24cce0d4b1f7d5..9f6e349a07c0b7462135f087ffd753e2615d8557 100644 (file)
--- a/gas/config/tc-tilegx.c
+++ b/gas/config/tc-tilegx.c
@@ -241,6 +241,10 @@ md_begin (void)
 {
   const struct tilegx_opcode *op;
   int i;
+  int mach = (tilegx_arch_size == 64) ? bfd_mach_tilegx : bfd_mach_tilegx32;
+
+  if (! bfd_set_arch_mach (stdoutput, bfd_arch_tilegx, mach))
+    as_warn (_("Could not set architecture and machine"));
 
   /* Guarantee text section is aligned.  */
   bfd_set_section_alignment (stdoutput, text_section,