x86: drop unused EXVexWdq / vex_w_dq_mode

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index dd41d8850032f4c571f836af7775bfe7ca44999f..9cfa3c72644f16bf463e62665e0dfa6a4842d7ef 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,10 @@
+2020-01-31  Jan Beulich  <jbeulich@suse.com>
+
+       * i386-dis.c (EXVexWdq, vex_w_dq_mode): Delete.
+       (vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode,
+       vex_scalar_w_dq_mode): Don't refer to vex_w_dq_mode in comments.
+       (intel_operand_size): Drop vex_w_dq_mode case label.
+
 2020-01-31  Richard Sandiford  <richard.sandiford@arm.com>
 
        * aarch64-tbl.h (aarch64_opcode): Set C_MAX_ELEM for SVE bfcvt.

diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index d3746b0b3139fd4fcf1b46090380a93eb4a90a68..10276c661abfe9e858994d94b123b234654b85e4 100644 (file)
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -405,7 +405,6 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
 #define EXxmmdw { OP_EX, xmmdw_mode }
 #define EXxmmqd { OP_EX, xmmqd_mode }
 #define EXymmq { OP_EX, ymmq_mode }
-#define EXVexWdq { OP_EX, vex_w_dq_mode }
 #define EXVexWdqScalar { OP_EX, vex_scalar_w_dq_mode }
 #define EXEvexXGscat { OP_EX, evex_x_gscat_mode }
 #define EXEvexXNoBcst { OP_EX, evex_x_nobcst_mode }
@@ -595,14 +594,12 @@ enum
   vex128_mode,
   /* 256bit vex mode */
   vex256_mode,
-  /* operand size depends on the VEX.W bit.  */
-  vex_w_dq_mode,
 
-  /* Similar to vex_w_dq_mode, with VSIB dword indices.  */
+  /* Operand size depends on the VEX.W bit, with VSIB dword indices.  */
   vex_vsib_d_w_dq_mode,
   /* Similar to vex_vsib_d_w_dq_mode, with smaller memory.  */
   vex_vsib_d_w_d_mode,
-  /* Similar to vex_w_dq_mode, with VSIB qword indices.  */
+  /* Operand size depends on the VEX.W bit, with VSIB qword indices.  */
   vex_vsib_q_w_dq_mode,
   /* Similar to vex_vsib_q_w_dq_mode, with smaller memory.  */
   vex_vsib_q_w_d_mode,
@@ -623,7 +620,7 @@ enum
   q_scalar_swap_mode,
   /* like vex_mode, ignore vector length.  */
   vex_scalar_mode,
-  /* like vex_w_dq_mode, ignore vector length.  */
+  /* Operand size depends on the VEX.W bit, ignore vector length.  */
   vex_scalar_w_dq_mode,
 
   /* Static rounding.  */
@@ -13775,7 +13772,6 @@ intel_operand_size (int bytemode, int sizeflag)
       oappend ("OWORD PTR ");
       break;
     case xmm_mdq_mode:
-    case vex_w_dq_mode:
     case vex_scalar_w_dq_mode:
       if (!need_vex)
        abort ();