ARM: Fix signed most significant multiply instructions.

diff --git a/src/arch/arm/isa/insts/mult.isa b/src/arch/arm/isa/insts/mult.isa
index 4b42e6c89bfed3c2f4239a6bf8748952a1d5a5ec..13c9df07b84654b05435e0f2b71dbe5c5b7ff9a5 100644 (file)
--- a/src/arch/arm/isa/insts/mult.isa
+++ b/src/arch/arm/isa/insts/mult.isa
@@ -284,29 +284,33 @@ let {{
                                   ''')
     buildMult4InstUnCc("smmla", '''Reg0 = resTemp =
                                        ((int64_t)(Reg3.ud << 32) +
-                                        Reg1.sw * Reg2.sw) >> 32;
+                                        (int64_t)Reg1.sw *
+                                        (int64_t)Reg2.sw) >> 32;
                                 ''')
     buildMult4InstUnCc("smmlar", '''Reg0 = resTemp =
                                         ((int64_t)(Reg3.ud << 32) +
-                                         Reg1.sw * Reg2.sw +
+                                         (int64_t)Reg1.sw *
+                                         (int64_t)Reg2.sw +
                                          ULL(0x80000000)) >> 32;
                                  ''')
     buildMult4InstUnCc("smmls", '''Reg0 = resTemp =
                                        ((int64_t)(Reg3.ud << 32) -
-                                        Reg1.sw * Reg2.sw) >> 32;
+                                        (int64_t)Reg1.sw *
+                                        (int64_t)Reg2.sw) >> 32;
                                 ''')
     buildMult4InstUnCc("smmlsr", '''Reg0 = resTemp =
                                         ((int64_t)(Reg3.ud << 32) -
-                                         Reg1.sw * Reg2.sw +
+                                         (int64_t)Reg1.sw *
+                                         (int64_t)Reg2.sw +
                                          ULL(0x80000000)) >> 32;
                                  ''')
     buildMult3InstUnCc("smmul", '''Reg0 = resTemp =
-                                       ((int64_t)Reg1 *
-                                        (int64_t)Reg2) >> 32;
+                                       ((int64_t)Reg1.sw *
+                                        (int64_t)Reg2.sw) >> 32;
                                 ''')
     buildMult3InstUnCc("smmulr", '''Reg0 = resTemp =
-                                        ((int64_t)Reg1 *
-                                         (int64_t)Reg2 +
+                                        ((int64_t)Reg1.sw *
+                                         (int64_t)Reg2.sw +
                                          ULL(0x80000000)) >> 32;
                                  ''')
     buildMult3InstCc  ("smuad", '''Reg0 = resTemp =