struct r300_capabilities* caps = r300_screen(r300->context.screen)->caps;
CS_LOCALS(r300);
- BEGIN_CS(26);
- /* Amount of time to wait for vertex fetches in PVS */
- OUT_CS_REG(VAP_PVS_VTX_TIMEOUT_REG, 0xffff);
+ BEGIN_CS(24 + (caps->has_tcl ? 2: 0));
+
/* Various GB enables */
OUT_CS_REG(R300_GB_ENABLE, R300_GB_POINT_STUFF_ENABLE |
R300_GB_LINE_STUFF_ENABLE | R300_GB_TRIANGLE_STUFF_ENABLE);
OUT_CS_REG(R300_FG_FOG_COLOR_G, 0x00000000);
OUT_CS_REG(R300_FG_FOG_COLOR_B, 0x00000000);
OUT_CS_REG(R300_FG_DEPTH_SRC, 0x00000000);
+
+ /* TCL-only stuff */
+ if (caps->has_tcl) {
+ /* Amount of time to wait for vertex fetches in PVS */
+ OUT_CS_REG(VAP_PVS_VTX_TIMEOUT_REG, 0xffff);
+ }
+
END_CS;
}
r300_emit_rs_block_state(r300, &r300_rs_block_clear_state);
}
- BEGIN_CS(106 + (caps->has_tcl ? 2 : 0));
+ BEGIN_CS(99 + (caps->has_tcl ? 9 : 0));
/* Flush PVS. */
OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0);
/* XXX endian */
if (caps->has_tcl) {
OUT_CS_REG(R300_VAP_CNTL_STATUS, R300_VC_NO_SWAP);
+ OUT_CS_REG(R300_VAP_CLIP_CNTL, R300_CLIP_DISABLE |
+ R300_PS_UCP_MODE_CLIP_AS_TRIFAN);
+ OUT_CS_REG_SEQ(R300_VAP_GB_VERT_CLIP_ADJ, 4);
+ OUT_CS_32F(1.0);
+ OUT_CS_32F(1.0);
+ OUT_CS_32F(1.0);
+ OUT_CS_32F(1.0);
} else {
OUT_CS_REG(R300_VAP_CNTL_STATUS, R300_VC_NO_SWAP |
R300_VAP_TCL_BYPASS);
OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, 0x0);
/* XXX magic number not in r300_reg */
OUT_CS_REG(R300_VAP_PSC_SGN_NORM_CNTL, 0xAAAAAAAA);
- OUT_CS_REG(R300_VAP_CLIP_CNTL, 0x0);
- OUT_CS_REG_SEQ(R300_VAP_GB_VERT_CLIP_ADJ, 4);
- OUT_CS_32F(1.0);
- OUT_CS_32F(1.0);
- OUT_CS_32F(1.0);
- OUT_CS_32F(1.0);
/* XXX point tex stuffing */
OUT_CS_REG_SEQ(R300_GA_POINT_S0, 1);
OUT_CS_32F(0.0);
OUT_CS_32F(1.0);
OUT_CS_32F(0.0);
- if (caps->has_tcl) {
- OUT_CS_REG(R300_VAP_CLIP_CNTL, R300_CLIP_DISABLE |
- R300_PS_UCP_MODE_CLIP_AS_TRIFAN);
- }
-
/* XXX */
OUT_CS_REG(R300_SC_CLIP_RULE, 0xaaaa);
END_CS;