rs6000: Disable HTM for Power10 and later by default
authorKewen Lin <linkw@linux.ibm.com>
Wed, 2 Dec 2020 07:55:34 +0000 (01:55 -0600)
committerKewen Lin <linkw@linux.ibm.com>
Wed, 2 Dec 2020 07:55:34 +0000 (01:55 -0600)
Power ISA 3.1 has dropped transactional memory support, this patch
is to disable HTM feature for power10 and later by default.

Bootstrapped/regtested on powerpc64le-linux-gnu P8 and P10.

gcc/ChangeLog:

* config/rs6000/rs6000.c (rs6000_option_override_internal):
Use OPTION_MASK_DIRECT_MOVE for Power8 target_enable instead
of OPTION_MASK_HTM.
* config/rs6000/rs6000-cpus.def (ISA_2_7_MASKS_SERVER):
Remove OPTION_MASK_HTM.
(RS6000_CPU): Add OPTION_MASK_HTM to power8, power9 and
powerpc64le entries.

gcc/config/rs6000/rs6000-cpus.def
gcc/config/rs6000/rs6000.c

index 8d2c1ffd6cf7b095995e1603fb9b18ddaabb2a93..482e1b69ddec8fea18a0e4830d55af6d4ac7a0e2 100644 (file)
@@ -51,7 +51,6 @@
                                 | OPTION_MASK_CRYPTO                   \
                                 | OPTION_MASK_DIRECT_MOVE              \
                                 | OPTION_MASK_EFFICIENT_UNALIGNED_VSX  \
-                                | OPTION_MASK_HTM                      \
                                 | OPTION_MASK_QUAD_MEMORY              \
                                 | OPTION_MASK_QUAD_MEMORY_ATOMIC)
 
@@ -240,10 +239,13 @@ RS6000_CPU ("power6x", PROCESSOR_POWER6, MASK_POWERPC64 | MASK_PPC_GPOPT
            | MASK_PPC_GFXOPT | MASK_MFCRF | MASK_POPCNTB | MASK_FPRND
            | MASK_CMPB | MASK_DFP | MASK_RECIP_PRECISION)
 RS6000_CPU ("power7", PROCESSOR_POWER7, MASK_POWERPC64 | ISA_2_6_MASKS_SERVER)
-RS6000_CPU ("power8", PROCESSOR_POWER8, MASK_POWERPC64 | ISA_2_7_MASKS_SERVER)
-RS6000_CPU ("power9", PROCESSOR_POWER9, MASK_POWERPC64 | ISA_3_0_MASKS_SERVER)
+RS6000_CPU ("power8", PROCESSOR_POWER8, MASK_POWERPC64 | ISA_2_7_MASKS_SERVER
+           | OPTION_MASK_HTM)
+RS6000_CPU ("power9", PROCESSOR_POWER9, MASK_POWERPC64 | ISA_3_0_MASKS_SERVER
+           | OPTION_MASK_HTM)
 RS6000_CPU ("power10", PROCESSOR_POWER10, MASK_POWERPC64 | ISA_3_1_MASKS_SERVER)
 RS6000_CPU ("powerpc", PROCESSOR_POWERPC, 0)
 RS6000_CPU ("powerpc64", PROCESSOR_POWERPC64, MASK_PPC_GFXOPT | MASK_POWERPC64)
-RS6000_CPU ("powerpc64le", PROCESSOR_POWER8, MASK_POWERPC64 | ISA_2_7_MASKS_SERVER)
+RS6000_CPU ("powerpc64le", PROCESSOR_POWER8, MASK_POWERPC64 | ISA_2_7_MASKS_SERVER
+           | OPTION_MASK_HTM)
 RS6000_CPU ("rs64", PROCESSOR_RS64A, MASK_PPC_GFXOPT | MASK_POWERPC64)
index 517467ebc632782181062acc782ad6abf5c66803..c661f7a8a6c96e3072f5ef78102cfc2485ea9163 100644 (file)
@@ -3808,9 +3808,10 @@ rs6000_option_override_internal (bool global_init_p)
     }
 
   /* If little-endian, default to -mstrict-align on older processors.
-     Testing for htm matches power8 and later.  */
+     Testing for direct_move matches power8 and later.  */
   if (!BYTES_BIG_ENDIAN
-      && !(processor_target_table[tune_index].target_enable & OPTION_MASK_HTM))
+      && !(processor_target_table[tune_index].target_enable
+          & OPTION_MASK_DIRECT_MOVE))
     rs6000_isa_flags |= ~rs6000_isa_flags_explicit & OPTION_MASK_STRICT_ALIGN;
 
   if (!rs6000_fold_gimple)