[ARM] Use Cortex-A17 tuning parameters for Cortex-A12
authorKyrylo Tkachov <kyrylo.tkachov@arm.com>
Mon, 12 Jan 2015 15:14:33 +0000 (15:14 +0000)
committerKyrylo Tkachov <ktkachov@gcc.gnu.org>
Mon, 12 Jan 2015 15:14:33 +0000 (15:14 +0000)
* config/arm/arm.c (arm_cortex_a12_tune): Update entries to match
Cortex-A17 tuning parameters.
* config/arm/arm-cores.def (cortex-a12): Schedule for cortex-a17.

From-SVN: r219472

gcc/ChangeLog
gcc/config/arm/arm-cores.def
gcc/config/arm/arm.c

index 3861f439b65bfb88ad645ea7d4032293642daf54..c757e0b175a15f1b1af66de5e5b139ed5da76567 100644 (file)
@@ -1,3 +1,9 @@
+2015-01-12  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       * config/arm/arm.c (arm_cortex_a12_tune): Update entries to match
+       Cortex-A17 tuning parameters.
+       * config/arm/arm-cores.def (cortex-a12): Schedule for cortex-a17.
+
 2015-01-12  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 
        * config/arm/arm-protos.h (tune_params): Add fuseable_ops field.
index 6fa5d99f37c868e3248ce3d5a4bbe5a06df20cdc..be125ac1aafc9c041af473896e2ffa8cb9707413 100644 (file)
@@ -148,7 +148,7 @@ ARM_CORE("cortex-a5",               cortexa5, cortexa5,             7A,  FL_LDSCHED, cortex_a5)
 ARM_CORE("cortex-a7",          cortexa7, cortexa7,             7A,  FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a7)
 ARM_CORE("cortex-a8",          cortexa8, cortexa8,             7A,  FL_LDSCHED, cortex_a8)
 ARM_CORE("cortex-a9",          cortexa9, cortexa9,             7A,  FL_LDSCHED, cortex_a9)
-ARM_CORE("cortex-a12",         cortexa12, cortexa15,           7A,  FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a12)
+ARM_CORE("cortex-a12",         cortexa12, cortexa17,           7A,  FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a12)
 ARM_CORE("cortex-a15",         cortexa15, cortexa15,           7A,  FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a15)
 ARM_CORE("cortex-a17",         cortexa17, cortexa17,           7A,  FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a12)
 ARM_CORE("cortex-r4",          cortexr4, cortexr4,             7R,  FL_LDSCHED, cortex)
index a9cc3e112856b971580dea6e90fb1c10a0ee2e2d..8ca2dd8de8a604ba0bbdd5135feeee9dc5c53bc3 100644 (file)
@@ -1950,17 +1950,17 @@ const struct tune_params arm_cortex_a12_tune =
 {
   arm_9e_rtx_costs,
   &cortexa12_extra_costs,
-  NULL,
+  NULL,                                                /* Sched adj cost.  */
   1,                                           /* Constant limit.  */
-  5,                                           /* Max cond insns.  */
-  ARM_PREFETCH_BENEFICIAL(4,32,32),
+  2,                                           /* Max cond insns.  */
+  ARM_PREFETCH_NOT_BENEFICIAL,
   false,                                       /* Prefer constant pool.  */
   arm_default_branch_cost,
   true,                                                /* Prefer LDRD/STRD.  */
   {true, true},                                        /* Prefer non short circuit.  */
   &arm_default_vec_cost,                        /* Vectorizer costs.  */
   false,                                        /* Prefer Neon for 64-bits bitops.  */
-  false, false,                                 /* Prefer 32-bit encodings.  */
+  true, true,                                   /* Prefer 32-bit encodings.  */
   true,                                                /* Prefer Neon for stringops.  */
   8,                                           /* Maximum insns to inline memset.  */
   ARM_FUSE_MOVW_MOVT                           /* Fuseable pairs of instructions.  */