gallium/radeon: assume X11 DRI3 can use at most 5 back buffers

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h
index fc50b91d685cf72330b661e6c8cf64de8433a6af..c145dc3a069ae076a0a0ac891dc3746a38fb40d5 100644 (file)
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -570,6 +570,10 @@ struct r600_common_context {
         * in r600_texture because r600_texture can be shared by multiple
         * contexts. This is for back buffers only. We shouldn't get too many
         * of those.
+        *
+        * X11 DRI3 rotates among a finite set of back buffers. They should
+        * all fit in this array. If they don't, separate DCC might never be
+        * enabled by DCC stat gathering.
         */
        struct {
                struct r600_texture             *tex;
@@ -579,7 +583,7 @@ struct r600_common_context {
                 * the least recently used slot is evicted based on this. */
                int64_t                         last_use_timestamp;
                bool                            query_active;
-       } dcc_stats[2];
+       } dcc_stats[5];
 
        /* The list of all texture buffer objects in this context.
         * This list is walked when a buffer is invalidated/reallocated and