h8300.md (*tst_extzv_bitqi_1_n): Take a scratch register.

	* config/h8300/h8300.md (*tst_extzv_bitqi_1_n): Take a scratch
	register.
	(*tst_extzv_memqi_1_n): Change to a splitter.
	(a peephole2): Update.

From-SVN: r63610

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index b76dec586d56391c998f2a2760984e4dd1bdf51b..7f7f6fd9e3d0d9a883f564771ededa5057639981 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2003-03-01  Kazu Hirata  <kazu@cs.umass.edu>
+
+       * config/h8300/h8300.md (*tst_extzv_bitqi_1_n): Take a scratch
+       register.
+       (*tst_extzv_memqi_1_n): Change to a splitter.
+       (a peephole2): Update.
+
 2003-03-01  Richard Earnshaw  <rearnsha@arm.com>
 
        * predict.c (estimate_bb_frequencies): Initialize the sreal

diff --git a/gcc/config/h8300/h8300.md b/gcc/config/h8300/h8300.md
index 162b9a3f95d6e5e54d6febf363227d0abb08341a..084d5abbee16ea5ee63f8cd61b74116a7d198c24 100644 (file)
--- a/gcc/config/h8300/h8300.md
+++ b/gcc/config/h8300/h8300.md
@@ -588,29 +588,35 @@
   [(set_attr "length" "2")
    (set_attr "cc" "set_zn")])
 
-(define_insn "*tst_extzv_bitqi_1_n"
-  [(set (cc0) (zero_extract:SI (match_operand:QI 0 "bit_operand" "r,U")
-                              (const_int 1)
-                              (match_operand 1 "const_int_operand" "n,n")))]
+(define_insn "*tst_extzv_1_n"
+  [(set (cc0)
+       (zero_extract:SI (match_operand:QI 0 "general_operand_src" "r,U,mn>")
+                        (const_int 1)
+                        (match_operand 1 "const_int_operand" "n,n,n")))
+   (clobber (match_scratch:QI 2 "=X,X,&r"))]
   "(TARGET_H8300H || TARGET_H8300S)"
-  "btst        %Z1,%Y0"
-  [(set_attr "length" "2,8")
-   (set_attr "cc" "set_zn,set_zn")])
+  "@
+   btst\\t%Z1,%Y0
+   btst\\t%Z1,%Y0
+   #"
+  [(set_attr "length" "2,8,10")
+   (set_attr "cc" "set_zn,set_zn,set_zn")])
 
-(define_insn_and_split "*tst_extzv_memqi_1_n"
-  [(set (cc0) (zero_extract:SI (match_operand:QI 0 "memory_operand" "m")
-                              (const_int 1)
-                              (match_operand 1 "const_int_operand" "n")))
-   (clobber (match_scratch:QI 2 "=&r"))]
+(define_split
+  [(set (cc0)
+       (zero_extract:SI (match_operand:QI 0 "general_operand" "")
+                        (const_int 1)
+                        (match_operand 1 "const_int_operand" "")))
+   (clobber (match_operand:QI 2 "register_operand" ""))]
   "(TARGET_H8300H || TARGET_H8300S)
+   && reload_completed
    && !EXTRA_CONSTRAINT (operands[0], 'U')"
-  "#"
-  "&& reload_completed"
   [(set (match_dup 2)
        (match_dup 0))
-   (set (cc0) (zero_extract:SI (match_dup 2)
-                              (const_int 1)
-                              (match_dup 1)))]
+   (parallel [(set (cc0) (zero_extract:SI (match_dup 2)
+                                         (const_int 1)
+                                         (match_dup 1)))
+             (clobber (scratch:QI))])]
   "")
 
 (define_insn ""
@@ -3513,10 +3519,11 @@
   "")
 
 (define_peephole2
-  [(set (cc0)
-       (zero_extract:SI (match_operand:QI 0 "register_operand" "")
-                        (const_int 1)
-                        (const_int 7)))
+  [(parallel [(set (cc0)
+                  (zero_extract:SI (match_operand:QI 0 "register_operand" "")
+                                   (const_int 1)
+                                   (const_int 7)))
+             (clobber (scratch:QI))])
    (set (pc)
        (if_then_else (match_operator 1 "eqne_operator"
                        [(cc0) (const_int 0)])