radeonsi: separate IA_MULTI_VGT_PARAM and VGT_PRIMITIVE_TYPE emission
authorMarek Olšák <marek.olsak@amd.com>
Fri, 30 Sep 2016 20:47:20 +0000 (22:47 +0200)
committerMarek Olšák <marek.olsak@amd.com>
Tue, 4 Oct 2016 14:11:56 +0000 (16:11 +0200)
We want to emit IA_MULTI_VGT_PARAM less often because it's a context reg.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
src/gallium/drivers/radeonsi/si_state_draw.c

index 41cc026fac894768fd20039b9f5962021dbaeea9..051ea9e2ecb0f21cf533083dc8c70282076fdd81 100644 (file)
@@ -473,18 +473,21 @@ static void si_emit_draw_registers(struct si_context *sctx,
        ia_multi_vgt_param = si_get_ia_multi_vgt_param(sctx, info, num_patches);
 
        /* Draw state. */
-       if (prim != sctx->last_prim ||
-           ia_multi_vgt_param != sctx->last_multi_vgt_param) {
-               if (sctx->b.chip_class >= CIK) {
+       if (ia_multi_vgt_param != sctx->last_multi_vgt_param) {
+               if (sctx->b.chip_class >= CIK)
                        radeon_set_context_reg_idx(cs, R_028AA8_IA_MULTI_VGT_PARAM, 1, ia_multi_vgt_param);
+               else
+                       radeon_set_context_reg(cs, R_028AA8_IA_MULTI_VGT_PARAM, ia_multi_vgt_param);
+
+               sctx->last_multi_vgt_param = ia_multi_vgt_param;
+       }
+       if (prim != sctx->last_prim) {
+               if (sctx->b.chip_class >= CIK)
                        radeon_set_uconfig_reg_idx(cs, R_030908_VGT_PRIMITIVE_TYPE, 1, prim);
-               } else {
+               else
                        radeon_set_config_reg(cs, R_008958_VGT_PRIMITIVE_TYPE, prim);
-                       radeon_set_context_reg(cs, R_028AA8_IA_MULTI_VGT_PARAM, ia_multi_vgt_param);
-               }
 
                sctx->last_prim = prim;
-               sctx->last_multi_vgt_param = ia_multi_vgt_param;
        }
 
        if (gs_out_prim != sctx->last_gs_out_prim) {