}
/* Vtxprog resources */
- if (nvws->res_init(&nv30->vertprog.exec_heap, 0, 512) ||
+ if (nvws->res_init(&nv30->vertprog.exec_heap, 0, 256) ||
nvws->res_init(&nv30->vertprog.data_heap, 0, 256)) {
nv30_destroy(&nv30->pipe);
return NULL;
// hw[3] |= NV30_VP_INST_SCA_DEST_TEMP_MASK;
// hw[3] |= (mask << NV30_VP_INST_VEC_WRITEMASK_SHIFT);
+ if (dst.type == NV30SR_OUTPUT) {
+ if (slot)
+ hw[3] |= (mask << NV30_VP_INST_SDEST_WRITEMASK_SHIFT);
+ else
+ hw[3] |= (mask << NV30_VP_INST_VDEST_WRITEMASK_SHIFT);
+ } else {
+ if (slot)
+ hw[3] |= (mask << NV30_VP_INST_STEMP_WRITEMASK_SHIFT);
+ else
+ hw[3] |= (mask << NV30_VP_INST_VTEMP_WRITEMASK_SHIFT);
+ }
+
emit_dst(vpc, hw, slot, dst);
emit_src(vpc, hw, 0, s0);
emit_src(vpc, hw, 1, s1);
}
#endif
BEGIN_RING(rankine, NV34TCL_VP_UPLOAD_FROM_ID, 1);
- OUT_RING (/*vp->exec->start*/0);
+ OUT_RING (vp->exec->start);
for (i = 0; i < vp->nr_insns; i++) {
BEGIN_RING(rankine, NV34TCL_VP_UPLOAD_INST(0), 4);
OUT_RINGp (vp->insns[i].data, 4);
}
BEGIN_RING(rankine, NV34TCL_VP_START_FROM_ID, 1);
-// OUT_RING (vp->exec->start);
- OUT_RING (0);
+ OUT_RING (vp->exec->start);
nv30->vertprog.active = vp;
}