radeonsi: Use stencil surface level information for stencil texturing

7 more little dwarves^W piglits.

NOTE: This is a candidate for the 9.1 branch.

diff --git a/src/gallium/drivers/radeonsi/r600_texture.c b/src/gallium/drivers/radeonsi/r600_texture.c
index 3f75adbdcef1e444409a969599eaee2d29133588..e8d9932e08eb1f29e1f9215786f02bc56ba86589 100644 (file)
--- a/src/gallium/drivers/radeonsi/r600_texture.c
+++ b/src/gallium/drivers/radeonsi/r600_texture.c
@@ -153,8 +153,7 @@ static int r600_init_surface(struct r600_screen *rscreen,
                surface->flags |= RADEON_SURF_SCANOUT;
        }
 
-       if ((ptex->bind & PIPE_BIND_DEPTH_STENCIL) &&
-           !is_flushed_depth && is_depth) {
+       if (!is_flushed_depth && is_depth) {
                surface->flags |= RADEON_SURF_ZBUFFER;
 
                if (is_stencil) {

diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 0c2ea868eb3098a276b7729ee8eb335f7de2c308..09665b5ab88fe4d09b4303b8ca696dcb03f6a18a 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -2088,6 +2088,7 @@ static struct pipe_sampler_view *si_create_sampler_view(struct pipe_context *ctx
        unsigned char state_swizzle[4], swizzle[4];
        unsigned height, depth, width;
        enum pipe_format pipe_format = state->format;
+       struct radeon_surface_level *surflevel;
        int first_non_void;
        uint64_t va;
 
@@ -2107,6 +2108,8 @@ static struct pipe_sampler_view *si_create_sampler_view(struct pipe_context *ctx
        state_swizzle[2] = state->swizzle_b;
        state_swizzle[3] = state->swizzle_a;
 
+       surflevel = tmp->surface.level;
+
        /* Texturing with separate depth and stencil. */
        if (tmp->is_depth && !tmp->is_flushing_texture) {
                switch (pipe_format) {
@@ -2122,6 +2125,7 @@ static struct pipe_sampler_view *si_create_sampler_view(struct pipe_context *ctx
                case PIPE_FORMAT_S8X24_UINT:
                case PIPE_FORMAT_X32_S8X24_UINT:
                        pipe_format = PIPE_FORMAT_S8_UINT;
+                       surflevel = tmp->surface.stencil_level;
                        break;
                default:;
                }
@@ -2194,10 +2198,10 @@ static struct pipe_sampler_view *si_create_sampler_view(struct pipe_context *ctx
        /* not supported any more */
        //endian = si_colorformat_endian_swap(format);
 
-       width = tmp->surface.level[0].npix_x;
-       height = tmp->surface.level[0].npix_y;
-       depth = tmp->surface.level[0].npix_z;
-       pitch = tmp->surface.level[0].nblk_x * util_format_get_blockwidth(pipe_format);
+       width = surflevel[0].npix_x;
+       height = surflevel[0].npix_y;
+       depth = surflevel[0].npix_z;
+       pitch = surflevel[0].nblk_x * util_format_get_blockwidth(pipe_format);
 
        if (texture->target == PIPE_TEXTURE_1D_ARRAY) {
                height = 1;
@@ -2207,7 +2211,7 @@ static struct pipe_sampler_view *si_create_sampler_view(struct pipe_context *ctx
        }
 
        va = r600_resource_va(ctx->screen, texture);
-       va += tmp->surface.level[0].offset;
+       va += surflevel[0].offset;
        view->state[0] = va >> 8;
        view->state[1] = (S_008F14_BASE_ADDRESS_HI(va >> 40) |
                          S_008F14_DATA_FORMAT(format) |