(no commit message)

diff --git a/openpower/sv/svp64/appendix.mdwn b/openpower/sv/svp64/appendix.mdwn
index 75a08fa8c6be46eaa94f627c8f95fea395b89e3a..4fcacdb0951e2c41d286fb2906b329ed7986976f 100644 (file)
--- a/openpower/sv/svp64/appendix.mdwn
+++ b/openpower/sv/svp64/appendix.mdwn
@@ -464,7 +464,9 @@ operation.  Identification
 of such is trivial to do for `setb` and `cmp`: the source register type is
 a completely different register file from the destination.
 Likewise Scalar reduction when the destination is a Vector
-is as if the Reduction Mode was not requested.*
+is as if the Reduction Mode was not requested. However it would clearly
+be unacceptable to perform such optimisations on cache-inhibited LD/ST,
+so some considerable care needs to be taken.*
 
 Typical applications include simple operations such as `ADD r3, r10.v,
 r3` where, clearly, r3 is being used to accumulate the addition of all