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s390-builtins.def: Fix value range of vec_load_bndry.
authorDominik Vogt <vogt@linux.vnet.ibm.com>
Fri, 21 Aug 2015 12:51:20 +0000 (12:51 +0000)
committerUlrich Weigand <uweigand@gcc.gnu.org>
Fri, 21 Aug 2015 12:51:20 +0000 (12:51 +0000)
gcc/ChangeLog
2015-08-21  Dominik Vogt  <vogt@linux.vnet.ibm.com>

* config/s390/s390-builtins.def: Fix value range of vec_load_bndry.

gcc/testsuite/ChangeLog
2015-08-21  Dominik Vogt  <vogt@linux.vnet.ibm.com>

* gcc.target/s390/zvector/vec-load_bndry-1.c: New test.

From-SVN: r227058

gcc/ChangeLog patch | blob | history
gcc/config/s390/s390-builtins.def patch | blob | history
gcc/testsuite/ChangeLog patch | blob | history
gcc/testsuite/gcc.target/s390/zvector/vec-load_bndry-1.c [new file with mode: 0644] patch | blob

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index adacd43664147ab809b46959fdec2970c41bb9a7..c5af8520cd3e030694da107c8d30636f5419e067 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2015-08-21  Dominik Vogt  <vogt@linux.vnet.ibm.com>
+
+       * config/s390/s390-builtins.def: Fix value range of vec_load_bndry.
+
 2015-08-21  Naveen H.S  <Naveen.Hurugalawadi@caviumnetworks.com>
 
        * fold-const.c (fold_binary_loc) : Move sqrt(x)*sqrt(x) as x
diff --git a/gcc/config/s390/s390-builtins.def b/gcc/config/s390/s390-builtins.def
index 0a24da9bcb175a09921c4f39e0b145ab29c9c815..b267b04e2a74d148c6beaff3cbd998ef145ac98a 100644 (file)
--- a/gcc/config/s390/s390-builtins.def
+++ b/gcc/config/s390/s390-builtins.def
@@ -438,15 +438,15 @@ B_DEF      (s390_vllezf,                vec_insert_and_zerov4si,0,
 B_DEF      (s390_vllezg,                vec_insert_and_zerov2di,0,              B_VX,               0,                  BT_FN_UV2DI_ULONGLONGCONSTPTR)
 
 OB_DEF     (s390_vec_load_bndry,        s390_vec_load_bndry_s8,s390_vec_load_bndry_dbl,B_VX,        BT_FN_OV4SI_INTCONSTPTR_INT)
-OB_DEF_VAR (s390_vec_load_bndry_s8,     s390_vlbb,          O2_U3,              BT_OV_V16QI_SCHARCONSTPTR_USHORT)
-OB_DEF_VAR (s390_vec_load_bndry_u8,     s390_vlbb,          O2_U3,              BT_OV_UV16QI_UCHARCONSTPTR_USHORT)
-OB_DEF_VAR (s390_vec_load_bndry_s16,    s390_vlbb,          O2_U3,              BT_OV_V8HI_SHORTCONSTPTR_USHORT)
-OB_DEF_VAR (s390_vec_load_bndry_u16,    s390_vlbb,          O2_U3,              BT_OV_UV8HI_USHORTCONSTPTR_USHORT)
-OB_DEF_VAR (s390_vec_load_bndry_s32,    s390_vlbb,          O2_U3,              BT_OV_V4SI_INTCONSTPTR_USHORT)
-OB_DEF_VAR (s390_vec_load_bndry_u32,    s390_vlbb,          O2_U3,              BT_OV_UV4SI_UINTCONSTPTR_USHORT)
-OB_DEF_VAR (s390_vec_load_bndry_s64,    s390_vlbb,          O2_U3,              BT_OV_V2DI_LONGLONGCONSTPTR_USHORT)
-OB_DEF_VAR (s390_vec_load_bndry_u64,    s390_vlbb,          O2_U3,              BT_OV_UV2DI_ULONGLONGCONSTPTR_USHORT)
-OB_DEF_VAR (s390_vec_load_bndry_dbl,    s390_vlbb,          O2_U3,              BT_OV_V2DF_DBLCONSTPTR_USHORT)
+OB_DEF_VAR (s390_vec_load_bndry_s8,     s390_vlbb,          O2_U16,              BT_OV_V16QI_SCHARCONSTPTR_USHORT)
+OB_DEF_VAR (s390_vec_load_bndry_u8,     s390_vlbb,          O2_U16,              BT_OV_UV16QI_UCHARCONSTPTR_USHORT)
+OB_DEF_VAR (s390_vec_load_bndry_s16,    s390_vlbb,          O2_U16,              BT_OV_V8HI_SHORTCONSTPTR_USHORT)
+OB_DEF_VAR (s390_vec_load_bndry_u16,    s390_vlbb,          O2_U16,              BT_OV_UV8HI_USHORTCONSTPTR_USHORT)
+OB_DEF_VAR (s390_vec_load_bndry_s32,    s390_vlbb,          O2_U16,              BT_OV_V4SI_INTCONSTPTR_USHORT)
+OB_DEF_VAR (s390_vec_load_bndry_u32,    s390_vlbb,          O2_U16,              BT_OV_UV4SI_UINTCONSTPTR_USHORT)
+OB_DEF_VAR (s390_vec_load_bndry_s64,    s390_vlbb,          O2_U16,              BT_OV_V2DI_LONGLONGCONSTPTR_USHORT)
+OB_DEF_VAR (s390_vec_load_bndry_u64,    s390_vlbb,          O2_U16,              BT_OV_UV2DI_ULONGLONGCONSTPTR_USHORT)
+OB_DEF_VAR (s390_vec_load_bndry_dbl,    s390_vlbb,          O2_U16,              BT_OV_V2DF_DBLCONSTPTR_USHORT)
 
 B_DEF      (s390_vlbb,                  vlbb,               0,                  B_VX,               O2_U3,              BT_FN_UV16QI_UCHARCONSTPTR_USHORT)
 
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index c4094e4555cea2805902e1ab27acb102d0e3f11c..171a92c286a0d8265d0640756b832d77512ee09e 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2015-08-21  Dominik Vogt  <vogt@linux.vnet.ibm.com>
+
+       * gcc.target/s390/zvector/vec-load_bndry-1.c: New test.
+
 2015-08-21  Dominik Vogt  <vogt@linux.vnet.ibm.com>
 
        * lib/gcc-dg.exp: Add extra options for db-final to the command line
diff --git a/gcc/testsuite/gcc.target/s390/zvector/vec-load_bndry-1.c b/gcc/testsuite/gcc.target/s390/zvector/vec-load_bndry-1.c
new file mode 100644 (file)
index 0000000..9ebf6c7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/zvector/vec-load_bndry-1.c
@@ -0,0 +1,80 @@
+/* { dg-do compile { target { s390*-*-* } } } */
+/* { dg-options "-O0 -mzarch -march=z13 -mzvector" } */
+
+#include <vecintrin.h>
+
+signed char
+foo64 (signed char *p)
+{
+  return vec_load_bndry (p, 64)[0];
+  /* { dg-final { scan-assembler-times "\tvlbb\t%v..?,0\\(%r..?\\),0" 1 } } */
+}
+
+signed char
+foo128 (signed char *p)
+{
+  return
+    vec_load_bndry (p, 128)[0]
+    + vec_load_bndry (p + 16, 128)[0];
+  /* { dg-final { scan-assembler-times "\tvlbb\t%v..?,0\\(%r..?\\),1" 2 } } */
+}
+
+signed char
+foo256 (signed char *p)
+{
+  return
+    vec_load_bndry (p, 256)[0]
+    + vec_load_bndry (p + 16, 256)[0]
+    + vec_load_bndry (p + 32, 256)[0];
+  /* { dg-final { scan-assembler-times "\tvlbb\t%v..?,0\\(%r..?\\),2" 3 } } */
+}
+
+signed char
+foo512 (signed char *p)
+{
+  return
+    vec_load_bndry (p, 512)[0]
+    + vec_load_bndry (p + 16, 512)[0]
+    + vec_load_bndry (p + 32, 512)[0]
+    + vec_load_bndry (p + 48, 512)[0];
+  /* { dg-final { scan-assembler-times "\tvlbb\t%v..?,0\\(%r..?\\),3" 4 } } */
+}
+
+signed char
+foo1024 (signed char *p)
+{
+  return
+    vec_load_bndry (p, 1024)[0]
+    + vec_load_bndry (p + 16, 1024)[0]
+    + vec_load_bndry (p + 32, 1024)[0]
+    + vec_load_bndry (p + 48, 1024)[0]
+    + vec_load_bndry (p + 64, 1024)[0];
+  /* { dg-final { scan-assembler-times "\tvlbb\t%v..?,0\\(%r..?\\),4" 5 } } */
+}
+
+signed char
+foo2048 (signed char *p)
+{
+  return
+    vec_load_bndry (p, 2048)[0]
+    + vec_load_bndry (p + 16, 2048)[0]
+    + vec_load_bndry (p + 32, 2048)[0]
+    + vec_load_bndry (p + 48, 2048)[0]
+    + vec_load_bndry (p + 64, 2048)[0]
+    + vec_load_bndry (p + 80, 2048)[0];
+  /* { dg-final { scan-assembler-times "\tvlbb\t%v..?,0\\(%r..?\\),5" 6 } } */
+}
+
+signed char
+foo4096 (signed char *p)
+{
+  return
+    vec_load_bndry (p, 4096)[0]
+    + vec_load_bndry (p + 16, 4096)[0]
+    + vec_load_bndry (p + 32, 4096)[0]
+    + vec_load_bndry (p + 48, 4096)[0]
+    + vec_load_bndry (p + 64, 4096)[0]
+    + vec_load_bndry (p + 80, 4096)[0]
+    + vec_load_bndry (p + 96, 4096)[0];
+  /* { dg-final { scan-assembler-times "\tvlbb\t%v..?,0\\(%r..?\\),6" 7 } } */
+}