Merge branch 'mesa_7_5_branch' into mesa_7_6_branch
authorIan Romanick <ian.d.romanick@intel.com>
Thu, 10 Sep 2009 18:24:56 +0000 (11:24 -0700)
committerIan Romanick <ian.d.romanick@intel.com>
Thu, 10 Sep 2009 18:24:56 +0000 (11:24 -0700)
Conflicts:
src/mesa/drivers/dri/intel/intel_context.c

1  2 
src/mesa/drivers/dri/intel/intel_chipset.h
src/mesa/drivers/dri/intel/intel_context.c

index 3c38f1676c9ed74fdef3e6dfb952649ab6335730,a528d996dcaeca1228db4f08e16e4d788c6195f2..3dc8653a7354a4405ce638c71a4e4181ee5f1e69
  #define PCI_CHIP_Q45_G                  0x2E12
  #define PCI_CHIP_G45_G                  0x2E22
  #define PCI_CHIP_G41_G                  0x2E32
+ #define PCI_CHIP_B43_G                  0x2E42
  
 +#define PCI_CHIP_ILD_G                  0x0042
 +#define PCI_CHIP_ILM_G                  0x0046
 +
  #define IS_MOBILE(devid)      (devid == PCI_CHIP_I855_GM || \
                                 devid == PCI_CHIP_I915_GM || \
                                 devid == PCI_CHIP_I945_GM || \
index 89f99f7ffdb1165cb0228d9559749de78264256b,aecb317eb83c87e524073e1db05a6c58f3f0fd7f..2364829a1e4c424aec3556e767163d0eaaac80fd
@@@ -162,12 -161,9 +162,15 @@@ intelGetString(GLcontext * ctx, GLenum 
        case PCI_CHIP_G41_G:
           chipset = "Intel(R) G41";
           break;
+       case PCI_CHIP_B43_G:
+          chipset = "Intel(R) B43";
+          break;
 +      case PCI_CHIP_ILD_G:
 +         chipset = "Intel(R) IGDNG_D";
 +         break;
 +      case PCI_CHIP_ILM_G:
 +         chipset = "Intel(R) IGDNG_M";
 +         break;
        default:
           chipset = "Unknown Intel Chipset";
           break;