rs6000-c.c (altivec-resolve_overloaded_builtin): Change handling of ALTIVEC_BUILTIN_V...
authorKelvin Nilsen <kelvin@gcc.gnu.org>
Wed, 30 Jan 2019 15:01:40 +0000 (15:01 +0000)
committerKelvin Nilsen <kelvin@gcc.gnu.org>
Wed, 30 Jan 2019 15:01:40 +0000 (15:01 +0000)
gcc/ChangeLog:

2019-01-30  Kelvin Nilsen  <kelvin@gcc.gnu.org>

* config/rs6000/rs6000-c.c (altivec-resolve_overloaded_builtin):
Change handling of ALTIVEC_BUILTIN_VEC_EXTRACT.  Coerce result to
type of vector element when vec_extract is implemented by direct
move.

gcc/testsuite/ChangeLog:

2019-01-30  Kelvin Nilsen  <kelvin@gcc.gnu.org>

* gcc.target/powerpc/vec-extract-schar-1.c: New test.
* gcc.target/powerpc/vec-extract-sint-1.c: New test.
* gcc.target/powerpc/vec-extract-sint128-1.c: New test.
* gcc.target/powerpc/vec-extract-slong-1.c: New test.
* gcc.target/powerpc/vec-extract-sshort-1.c: New test.
* gcc.target/powerpc/vec-extract-uchar-1.c: New test.
* gcc.target/powerpc/vec-extract-uint-1.c: New test.
* gcc.target/powerpc/vec-extract-uint128-1.c: New test.
* gcc.target/powerpc/vec-extract-ulong-1.c: New test.
* gcc.target/powerpc/vec-extract-ushort-1.c: New test.

From-SVN: r268391

13 files changed:
gcc/ChangeLog
gcc/config/rs6000/rs6000-c.c
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/powerpc/vec-extract-schar-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/powerpc/vec-extract-sint-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/powerpc/vec-extract-sint128-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/powerpc/vec-extract-slong-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/powerpc/vec-extract-sshort-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/powerpc/vec-extract-uchar-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/powerpc/vec-extract-uint-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/powerpc/vec-extract-uint128-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/powerpc/vec-extract-ulong-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/powerpc/vec-extract-ushort-1.c [new file with mode: 0644]

index 3b59dad778d0baae1c5a1485d0342c99b834192f..e63082a724937b03b153e001bb7b0a40eedcc267 100644 (file)
@@ -1,3 +1,10 @@
+2019-01-30  Kelvin Nilsen  <kelvin@gcc.gnu.org>
+
+       * config/rs6000/rs6000-c.c (altivec-resolve_overloaded_builtin):
+       Change handling of ALTIVEC_BUILTIN_VEC_EXTRACT.  Coerce result to
+       type of vector element when vec_extract is implemented by direct
+       move.
+
 2019-01-30  Thomas Schwinge  <thomas@codesourcery.com>
 
        * doc/invoke.texi (C Language Options): List "-fopenacc-dim".
index 245a92f3befdd7d232dee3f50f4aada6a601ab19..ae39eb77ea1d6245bf98942517839ab2a0a708c5 100644 (file)
@@ -6645,7 +6645,13 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,
            }
 
          if (call)
-           return build_call_expr (call, 2, arg1, arg2);
+           {
+             tree result = build_call_expr (call, 2, arg1, arg2);
+             /* Coerce the result to vector element type.  May be no-op.  */
+             arg1_inner_type = TREE_TYPE (arg1_type);
+             result = fold_convert (arg1_inner_type, result);
+             return result;
+           }
        }
 
       /* Build *(((arg1_inner_type*)&(vector type){arg1})+arg2). */
index 3488fdd717fe506253797a4e0fb68fee6043691e..3d02efb8ade42ac9922835bb2211dbe47c2693c3 100644 (file)
@@ -1,3 +1,16 @@
+2019-01-30  Kelvin Nilsen  <kelvin@gcc.gnu.org>
+
+       * gcc.target/powerpc/vec-extract-schar-1.c: New test.
+       * gcc.target/powerpc/vec-extract-sint-1.c: New test.
+       * gcc.target/powerpc/vec-extract-sint128-1.c: New test.
+       * gcc.target/powerpc/vec-extract-slong-1.c: New test.
+       * gcc.target/powerpc/vec-extract-sshort-1.c: New test.
+       * gcc.target/powerpc/vec-extract-uchar-1.c: New test.
+       * gcc.target/powerpc/vec-extract-uint-1.c: New test.
+       * gcc.target/powerpc/vec-extract-uint128-1.c: New test.
+       * gcc.target/powerpc/vec-extract-ulong-1.c: New test.
+       * gcc.target/powerpc/vec-extract-ushort-1.c: New test.
+       
 2019-01-30  Richard Biener  <rguenther@suse.de>
 
        PR tree-optimization/89111
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-schar-1.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-schar-1.c
new file mode 100644 (file)
index 0000000..bd4d8b6
--- /dev/null
@@ -0,0 +1,29 @@
+/* Test to verify that the vec_extract from a vector of
+   signed chars remains signed.  */
+/* { dg-do run } */
+/* { dg-options "-ansi -mcpu=power8 " } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+
+#include <altivec.h>
+#include <stdio.h>
+#include <stdlib.h>
+
+int test1(signed char sc) {
+  int sce;
+
+  vector signed char v = vec_splats(sc);
+  sce = vec_extract(v,0);
+
+  if (sce != sc)
+    abort();
+  return 0;
+}
+
+int main()
+{
+  test1 (0xf6);
+  test1 (0x76);
+  test1 (0x06);
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-sint-1.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-sint-1.c
new file mode 100644 (file)
index 0000000..9e32de3
--- /dev/null
@@ -0,0 +1,29 @@
+/* Test to verify that the vec_extract from a vector of
+   signed ints remains signed.  */
+/* { dg-do run } */
+/* { dg-options "-ansi -mcpu=power8 " } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+
+#include <altivec.h>
+#include <stdio.h>
+#include <stdlib.h>
+
+int test1(signed int si) {
+  long long int sie;
+
+  vector signed int v = vec_splats(si);
+  sie = vec_extract(v,0);
+
+  if (sie != si)
+    abort();
+  return 0;
+}
+
+int main()
+{
+  test1 (0xf6000000);
+  test1 (0x76000000);
+  test1 (0x06000000);
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-sint128-1.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-sint128-1.c
new file mode 100644 (file)
index 0000000..7e16074
--- /dev/null
@@ -0,0 +1,27 @@
+/* Test to verify that the vec_extract from a vector of
+   signed __int128s remains signed.  */
+/* { dg-do run } */
+/* { dg-options "-ansi -mcpu=power8 " } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+
+#include <altivec.h>
+#include <stdio.h>
+#include <stdlib.h>
+
+int test1(signed __int128 st) {
+
+  vector signed __int128 v = vec_splats(st);
+
+  if (vec_extract (v, 0) > st)
+    abort();
+  return 0;
+}
+
+int main()
+{
+  test1 (((__int128) 0xf600000000000000LL) << 64);
+  test1 (((__int128) 0x7600000000000000LL) << 64);
+  test1 (((__int128) 0x0600000000000000LL) << 64);
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-slong-1.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-slong-1.c
new file mode 100644 (file)
index 0000000..9b34127
--- /dev/null
@@ -0,0 +1,27 @@
+/* Test to verify that the vec_extract from a vector of
+   signed longs remains signed.  */
+/* { dg-do run } */
+/* { dg-options "-ansi -mcpu=power8 " } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+
+#include <altivec.h>
+#include <stdio.h>
+#include <stdlib.h>
+
+int test1(signed long long int sl) {
+
+  vector signed long long int v = vec_splats(sl);
+
+  if (vec_extract (v, 0) > sl)
+    abort();
+  return 0;
+}
+
+int main()
+{
+  test1 (0xf600000000000000LL);
+  test1 (0x7600000000000000LL);
+  test1 (0x0600000000000000LL);
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-sshort-1.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-sshort-1.c
new file mode 100644 (file)
index 0000000..24d2e28
--- /dev/null
@@ -0,0 +1,29 @@
+/* Test to verify that the vec_extract from a vector of
+   signed shorts remains signed.  */
+/* { dg-do run } */
+/* { dg-options "-ansi -mcpu=power8 " } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+
+#include <altivec.h>
+#include <stdio.h>
+#include <stdlib.h>
+
+int test1(signed short ss) {
+  int sse;
+
+  vector signed short v = vec_splats(ss);
+  sse = vec_extract(v,0);
+
+  if (sse != ss)
+    abort();
+  return 0;
+}
+
+int main()
+{
+  test1 (0xf600);
+  test1 (0x7600);
+  test1 (0x0600);
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-uchar-1.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-uchar-1.c
new file mode 100644 (file)
index 0000000..ed4cb0a
--- /dev/null
@@ -0,0 +1,29 @@
+/* Test to verify that the vec_extract from a vector of
+   unsigned chars remains unsigned.  */
+/* { dg-do run } */
+/* { dg-options "-ansi -mcpu=power8 " } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+
+#include <altivec.h>
+#include <stdio.h>
+#include <stdlib.h>
+
+int test1(unsigned char uc) {
+  int uce;
+
+  vector unsigned char v = vec_splats(uc);
+  uce = vec_extract(v,0);
+
+  if (uce != uc)
+    abort();
+  return 0;
+}
+
+int main()
+{
+  test1 (0xf6);
+  test1 (0x76);
+  test1 (0x06);
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-uint-1.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-uint-1.c
new file mode 100644 (file)
index 0000000..aa485f7
--- /dev/null
@@ -0,0 +1,29 @@
+/* Test to verify that the vec_extract from a vector of
+   unsigned ints remains unsigned.  */
+/* { dg-do run } */
+/* { dg-options "-ansi -mcpu=power8 " } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+
+#include <altivec.h>
+#include <stdio.h>
+#include <stdlib.h>
+
+int test1(unsigned int ui) {
+  long long int uie;
+
+  vector unsigned int v = vec_splats(ui);
+  uie = vec_extract(v,0);
+
+  if (uie != ui)
+    abort();
+  return 0;
+}
+
+int main()
+{
+  test1 (0xf6000000);
+  test1 (0x76000000);
+  test1 (0x06000000);
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-uint128-1.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-uint128-1.c
new file mode 100644 (file)
index 0000000..a4ff9c7
--- /dev/null
@@ -0,0 +1,27 @@
+/* Test to verify that the vec_extract from a vector of
+   unsigned __int128s remains unsigned.  */
+/* { dg-do run } */
+/* { dg-options "-ansi -mcpu=power8 " } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+
+#include <altivec.h>
+#include <stdio.h>
+#include <stdlib.h>
+
+int test1(unsigned __int128 ul) {
+
+  vector unsigned __int128 v = vec_splats(ul);
+
+  if (vec_extract (v, 0) < ul)
+    abort();
+  return 0;
+}
+
+int main()
+{
+  test1 (((__int128) 0xf600000000000000LL) << 64);
+  test1 (((__int128) 0x7600000000000000LL) << 64);
+  test1 (((__int128) 0x0600000000000000LL) << 64);
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-ulong-1.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-ulong-1.c
new file mode 100644 (file)
index 0000000..be9d6a6
--- /dev/null
@@ -0,0 +1,27 @@
+/* Test to verify that the vec_extract from a vector of
+   unsigned longs remains unsigned.  */
+/* { dg-do run } */
+/* { dg-options "-ansi -mcpu=power8 " } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+
+#include <altivec.h>
+#include <stdio.h>
+#include <stdlib.h>
+
+int test1(unsigned long long int ul) {
+
+  vector unsigned long long int v = vec_splats(ul);
+
+  if (vec_extract (v, 0) < ul)
+    abort();
+  return 0;
+}
+
+int main()
+{
+  test1 (0xf600000000000000LL);
+  test1 (0x7600000000000000LL);
+  test1 (0x0600000000000000LL);
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/vec-extract-ushort-1.c b/gcc/testsuite/gcc.target/powerpc/vec-extract-ushort-1.c
new file mode 100644 (file)
index 0000000..1c36832
--- /dev/null
@@ -0,0 +1,29 @@
+/* Test to verify that the vec_extract from a vector of
+   signed shorts remains signed.  */
+/* { dg-do run } */
+/* { dg-options "-ansi -mcpu=power8 " } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+
+#include <altivec.h>
+#include <stdio.h>
+#include <stdlib.h>
+
+int test1(unsigned short us) {
+  int use;
+
+  vector unsigned short v = vec_splats(us);
+  use = vec_extract(v,0);
+
+  if (use != us)
+    abort();
+  return 0;
+}
+
+int main()
+{
+  test1 (0xf600);
+  test1 (0x7600);
+  test1 (0x0600);
+  return 0;
+}