#include "regcache.h"
#include "dis-asm.h"
#include "osabi.h"
+#include "elf-bfd.h"
+#include "elf/v850.h"
enum
{
E_R146_REGNUM,
E_R147_REGNUM,
E_R148_REGNUM,
- E_NUM_REGS
+ E_R149_REGNUM,
+ E_NUM_OF_V850E2_REGS,
+
+ /* v850e3v5 system registers, selID 1 thru 7. */
+ E_SELID_1_R0_REGNUM = E_NUM_OF_V850E2_REGS,
+ E_SELID_1_R31_REGNUM = E_SELID_1_R0_REGNUM + 31,
+
+ E_SELID_2_R0_REGNUM,
+ E_SELID_2_R31_REGNUM = E_SELID_2_R0_REGNUM + 31,
+
+ E_SELID_3_R0_REGNUM,
+ E_SELID_3_R31_REGNUM = E_SELID_3_R0_REGNUM + 31,
+
+ E_SELID_4_R0_REGNUM,
+ E_SELID_4_R31_REGNUM = E_SELID_4_R0_REGNUM + 31,
+
+ E_SELID_5_R0_REGNUM,
+ E_SELID_5_R31_REGNUM = E_SELID_5_R0_REGNUM + 31,
+
+ E_SELID_6_R0_REGNUM,
+ E_SELID_6_R31_REGNUM = E_SELID_6_R0_REGNUM + 31,
+
+ E_SELID_7_R0_REGNUM,
+ E_SELID_7_R31_REGNUM = E_SELID_7_R0_REGNUM + 31,
+
+ /* v850e3v5 vector registers. */
+ E_VR0_REGNUM,
+ E_VR31_REGNUM = E_VR0_REGNUM + 31,
+
+ E_NUM_OF_V850E3V5_REGS,
+
+ /* Total number of possible registers. */
+ E_NUM_REGS = E_NUM_OF_V850E3V5_REGS
};
enum
E_MAX_RETTYPE_SIZE_IN_REGS = 2 * v850_reg_size
};
+/* When v850 support was added to GCC in the late nineties, the intention
+ was to follow the Green Hills ABI for v850. In fact, the authors of
+ that support at the time thought that they were doing so. As far as
+ I can tell, the calling conventions are correct, but the return value
+ conventions were not quite right. Over time, the return value code
+ in this file was modified to mostly reflect what GCC was actually
+ doing instead of to actually follow the Green Hills ABI as it did
+ when the code was first written.
+
+ Renesas defined the RH850 ABI which they use in their compiler. It
+ is similar to the original Green Hills ABI with some minor
+ differences. */
+
+enum v850_abi
+{
+ V850_ABI_GCC,
+ V850_ABI_RH850
+};
+
+/* Architecture specific data. */
+
+struct gdbarch_tdep
+{
+ /* Fields from the ELF header. */
+ int e_flags;
+ int e_machine;
+
+ /* Which ABI are we using? */
+ enum v850_abi abi;
+ int eight_byte_align;
+};
+
struct v850_frame_cache
{
/* Base address. */
"", "", "", "", "", "", "", "",
"", "", "", "fpspc"
};
- if (regnum < 0 || regnum >= E_NUM_REGS)
+ if (regnum < 0 || regnum >= E_NUM_OF_V850E2_REGS)
return NULL;
return v850e2_reg_names[regnum];
}
+/* Implement the "register_name" gdbarch method for v850e3v5. */
+
+static const char *
+v850e3v5_register_name (struct gdbarch *gdbarch, int regnum)
+{
+ static const char *v850e3v5_reg_names[] =
+ {
+ /* General purpose registers. */
+ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
+ "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
+ "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
+ "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
+
+ /* selID 0, not including FPU registers. The FPU registers are
+ listed later on. */
+ "eipc", "eipsw", "fepc", "fepsw",
+ "", "psw", "" /* fpsr */, "" /* fpepc */,
+ "" /* fpst */, "" /* fpcc */, "" /* fpcfg */, "" /* fpec */,
+ "sesr", "eiic", "feic", "",
+ "ctpc", "ctpsw", "", "", "ctbp", "", "", "",
+ "", "", "", "", "eiwr", "fewr", "", "bsel",
+
+
+ /* PC. */
+ "pc", "",
+
+ /* v850e2 MPV bank. */
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "",
+
+ /* Skip v850e2 MPU bank. It's tempting to reuse these, but we need
+ 32 entries for this bank. */
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "",
+
+ /* FPU system registers. These are actually in selID 0, but
+ are placed here to preserve register numbering compatibility
+ with previous architectures. */
+ "", "", "", "", "", "", "fpsr", "fpepc",
+ "fpst", "fpcc", "fpcfg", "fpec", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "",
+
+ /* selID 1. */
+ "mcfg0", "mcfg1", "rbase", "ebase", "intbp", "mctl", "pid", "fpipr",
+ "", "", "tcsel", "sccfg", "scbp", "hvccfg", "hvcbp", "vsel",
+ "vmprt0", "vmprt1", "vmprt2", "", "", "", "", "vmscctl",
+ "vmsctbl0", "vmsctbl1", "vmsctbl2", "vmsctbl3", "", "", "", "",
+
+ /* selID 2. */
+ "htcfg0", "", "", "", "", "htctl", "mea", "asid",
+ "mei", "ispr", "pmr", "icsr", "intcfg", "", "", "",
+ "tlbsch", "", "", "", "", "", "", "htscctl",
+ "htsctbl0", "htsctbl1", "htsctbl2", "htsctbl3",
+ "htsctbl4", "htsctbl5", "htsctbl6", "htsctbl7",
+
+ /* selID 3. */
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+
+ /* selID 4. */
+ "tlbidx", "", "", "", "telo0", "telo1", "tehi0", "tehi1",
+ "", "", "tlbcfg", "", "bwerrl", "bwerrh", "brerrl", "brerrh",
+ "ictagl", "ictagh", "icdatl", "icdath",
+ "dctagl", "dctagh", "dcdatl", "dcdath",
+ "icctrl", "dcctrl", "iccfg", "dccfg", "icerr", "dcerr", "", "",
+
+ /* selID 5. */
+ "mpm", "mprc", "", "", "mpbrgn", "mptrgn", "", "",
+ "mca", "mcs", "mcc", "mcr", "", "", "", "",
+ "", "", "", "", "mpprt0", "mpprt1", "mpprt2", "",
+ "", "", "", "", "", "", "", "",
+
+ /* selID 6. */
+ "mpla0", "mpua0", "mpat0", "", "mpla1", "mpua1", "mpat1", "",
+ "mpla2", "mpua2", "mpat2", "", "mpla3", "mpua3", "mpat3", "",
+ "mpla4", "mpua4", "mpat4", "", "mpla5", "mpua5", "mpat5", "",
+ "mpla6", "mpua6", "mpat6", "", "mpla7", "mpua7", "mpat7", "",
+
+ /* selID 7. */
+ "mpla8", "mpua8", "mpat8", "", "mpla9", "mpua9", "mpat9", "",
+ "mpla10", "mpua10", "mpat10", "", "mpla11", "mpua11", "mpat11", "",
+ "mpla12", "mpua12", "mpat12", "", "mpla13", "mpua13", "mpat13", "",
+ "mpla14", "mpua14", "mpat14", "", "mpla15", "mpua15", "mpat15", "",
+
+ /* Vector Registers */
+ "vr0", "vr1", "vr2", "vr3", "vr4", "vr5", "vr6", "vr7",
+ "vr8", "vr9", "vr10", "vr11", "vr12", "vr13", "vr14", "vr15",
+ "vr16", "vr17", "vr18", "vr19", "vr20", "vr21", "vr22", "vr23",
+ "vr24", "vr25", "vr26", "vr27", "vr28", "vr29", "vr30", "vr31",
+ };
+
+ if (regnum < 0 || regnum >= E_NUM_OF_V850E3V5_REGS)
+ return NULL;
+ return v850e3v5_reg_names[regnum];
+}
+
/* Returns the default type for register N. */
static struct type *
{
if (regnum == E_PC_REGNUM)
return builtin_type (gdbarch)->builtin_func_ptr;
+ else if (E_VR0_REGNUM <= regnum && regnum <= E_VR31_REGNUM)
+ return builtin_type (gdbarch)->builtin_uint64;
return builtin_type (gdbarch)->builtin_int32;
}
}
/* Should call_function allocate stack space for a struct return? */
+
static int
-v850_use_struct_convention (struct type *type)
+v850_use_struct_convention (struct gdbarch *gdbarch, struct type *type)
{
int i;
struct type *fld_type, *tgt_type;
+ if (gdbarch_tdep (gdbarch)->abi == V850_ABI_RH850)
+ {
+ if (v850_type_is_scalar (type) && TYPE_LENGTH(type) <= 8)
+ return 0;
+
+ /* Structs are never returned in registers for this ABI. */
+ return 1;
+ }
/* 1. The value is greater than 8 bytes -> returned by copying. */
if (TYPE_LENGTH (type) > 8)
return 1;
for (i = 0; i < TYPE_NFIELDS (type); ++i)
{
fld_type = TYPE_FIELD_TYPE (type, 0);
- if (!v850_use_struct_convention (fld_type))
+ if (!v850_use_struct_convention (gdbarch, fld_type))
return 0;
}
}
}
/* Structure for mapping bits in register lists to register numbers. */
+
struct reg_list
{
long mask;
return pc;
}
+/* Return 1 if the data structure has any 8-byte fields that'll require
+ the entire data structure to be aligned. Otherwise, return 0. */
+
+static int
+v850_eight_byte_align_p (struct type *type)
+{
+ type = check_typedef (type);
+
+ if (v850_type_is_scalar (type))
+ return (TYPE_LENGTH (type) == 8);
+ else
+ {
+ int i;
+
+ for (i = 0; i < TYPE_NFIELDS (type); i++)
+ {
+ if (v850_eight_byte_align_p (TYPE_FIELD_TYPE (type, i)))
+ return 1;
+ }
+ }
+ return 0;
+}
+
static CORE_ADDR
v850_frame_align (struct gdbarch *ignore, CORE_ADDR sp)
{
int len = 0;
int stack_offset;
+ if (gdbarch_tdep (gdbarch)->abi == V850_ABI_RH850)
+ stack_offset = 0;
+ else
/* The offset onto the stack at which we will start copying parameters
(after the registers are used up) begins at 16 rather than at zero.
That's how the ABI is defined, though there's no indication that these
gdb_byte valbuf[v850_reg_size];
if (!v850_type_is_scalar (value_type (*args))
+ && gdbarch_tdep (gdbarch)->abi == V850_ABI_GCC
&& TYPE_LENGTH (value_type (*args)) > E_MAX_RETTYPE_SIZE_IN_REGS)
{
store_unsigned_integer (valbuf, 4, byte_order,
val = (gdb_byte *) value_contents (*args);
}
+ if (gdbarch_tdep (gdbarch)->eight_byte_align
+ && v850_eight_byte_align_p (value_type (*args)))
+ {
+ if (argreg <= E_ARGLAST_REGNUM && (argreg & 1))
+ argreg++;
+ else if (stack_offset & 0x4)
+ stack_offset += 4;
+ }
+
while (len > 0)
if (argreg <= E_ARGLAST_REGNUM)
{
struct type *type, struct regcache *regcache,
gdb_byte *readbuf, const gdb_byte *writebuf)
{
- if (v850_use_struct_convention (type))
+ if (v850_use_struct_convention (gdbarch, type))
return RETURN_VALUE_STRUCT_CONVENTION;
if (writebuf)
v850_store_return_value (type, regcache, writebuf);
}
const static unsigned char *
-v850_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr, int *lenptr)
+v850_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr,
+ int *lenptr)
{
static unsigned char breakpoint[] = { 0x85, 0x05 };
+
+ *lenptr = sizeof (breakpoint);
+ return breakpoint;
+}
+
+/* Implement software breakpoints by using the dbtrap instruction.
+ Older architectures had no such instruction. For those, an
+ unconditional branch to self instruction is used. */
+
+const static unsigned char *
+v850_dbtrap_breakpoint_from_pc (struct gdbarch *gdbarch,
+ CORE_ADDR *pcptr, int *lenptr)
+{
+ static unsigned char breakpoint[] = { 0x40, 0xf8 };
+
*lenptr = sizeof (breakpoint);
return breakpoint;
}
v850_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
{
struct gdbarch *gdbarch;
+ struct gdbarch_tdep *tdep;
+ int e_flags, e_machine;
+
+ /* Extract the elf_flags if available. */
+ if (info.abfd != NULL
+ && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
+ {
+ e_flags = elf_elfheader (info.abfd)->e_flags;
+ e_machine = elf_elfheader (info.abfd)->e_machine;
+ }
+ else
+ {
+ e_flags = 0;
+ e_machine = 0;
+ }
- /* Change the register names based on the current machine type. */
- if (info.bfd_arch_info->arch != bfd_arch_v850)
- return NULL;
- gdbarch = gdbarch_alloc (&info, NULL);
+ /* Try to find the architecture in the list of already defined
+ architectures. */
+ for (arches = gdbarch_list_lookup_by_info (arches, &info);
+ arches != NULL;
+ arches = gdbarch_list_lookup_by_info (arches->next, &info))
+ {
+ if (gdbarch_tdep (arches->gdbarch)->e_flags != e_flags
+ || gdbarch_tdep (arches->gdbarch)->e_machine != e_machine)
+ continue;
+
+ return arches->gdbarch;
+ }
+ tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
+ tdep->e_flags = e_flags;
+ tdep->e_machine = e_machine;
+
+ switch (tdep->e_machine)
+ {
+ case EM_V800:
+ tdep->abi = V850_ABI_RH850;
+ break;
+ default:
+ tdep->abi = V850_ABI_GCC;
+ break;
+ }
+
+ tdep->eight_byte_align = (tdep->e_flags & EF_RH850_DATA_ALIGN8) ? 1 : 0;
+ gdbarch = gdbarch_alloc (&info, tdep);
switch (info.bfd_arch_info->mach)
{
set_gdbarch_register_name (gdbarch, v850e2_register_name);
set_gdbarch_num_regs (gdbarch, E_NUM_REGS);
break;
+ case bfd_mach_v850e3v5:
+ set_gdbarch_register_name (gdbarch, v850e3v5_register_name);
+ set_gdbarch_num_regs (gdbarch, E_NUM_OF_V850E3V5_REGS);
+ break;
}
set_gdbarch_num_pseudo_regs (gdbarch, 0);
set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT);
set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
- set_gdbarch_breakpoint_from_pc (gdbarch, v850_breakpoint_from_pc);
+ switch (info.bfd_arch_info->mach)
+ {
+ case bfd_mach_v850e2:
+ case bfd_mach_v850e2v3:
+ case bfd_mach_v850e3v5:
+ set_gdbarch_breakpoint_from_pc (gdbarch, v850_dbtrap_breakpoint_from_pc);
+ break;
+ default:
+ set_gdbarch_breakpoint_from_pc (gdbarch, v850_breakpoint_from_pc);
+ break;
+ }
set_gdbarch_return_value (gdbarch, v850_return_value);
set_gdbarch_push_dummy_call (gdbarch, v850_push_dummy_call);
_initialize_v850_tdep (void)
{
register_gdbarch_init (bfd_arch_v850, v850_gdbarch_init);
+ register_gdbarch_init (bfd_arch_v850_rh850, v850_gdbarch_init);
}
projects / binutils-gdb.git / commitdiff