winsys/radeon: fix a wrong NUM_TILE_PIPES value from the kernel
authorMarek Olšák <marek.olsak@amd.com>
Sun, 7 Feb 2016 19:25:01 +0000 (20:25 +0100)
committerMarek Olšák <marek.olsak@amd.com>
Tue, 9 Feb 2016 14:26:40 +0000 (15:26 +0100)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94019

Tested-by: Nick Sarnie <commendsarnex@gmail.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
src/gallium/winsys/radeon/drm/radeon_drm_winsys.c

index 35dc7e69dcf4b737ef76e7a9334cf8b91a87fc86..49c310cfdf70684b0fb04f49267ce55445ffdda3 100644 (file)
@@ -405,6 +405,12 @@ static boolean do_winsys_init(struct radeon_drm_winsys *ws)
             radeon_get_drm_value(ws->fd, RADEON_INFO_NUM_TILE_PIPES, NULL,
                                  &ws->info.num_tile_pipes);
 
+            /* The kernel returns 12 for some cards for an unknown reason.
+             * I thought this was supposed to be a power of two.
+             */
+            if (ws->gen == DRV_SI && ws->info.num_tile_pipes == 12)
+                ws->info.num_tile_pipes = 8;
+
             if (radeon_get_drm_value(ws->fd, RADEON_INFO_BACKEND_MAP, NULL,
                                       &ws->info.r600_gb_backend_map))
                 ws->info.r600_gb_backend_map_valid = TRUE;