latches are always set to zero

diff --git a/passes/sat/sim.cc b/passes/sat/sim.cc
index 73e03067b7d2b8c44410999aa2c97955c218dac8..f480168bdf2804346e90f13c8b8d96d6ac9b8b17 100644 (file)
--- a/passes/sat/sim.cc
+++ b/passes/sat/sim.cc
@@ -1815,12 +1815,7 @@ struct AIWWriter : public OutputWriter
                                for (int i = 0;; i++)
                                {
                                        if (aiw_latches.count(i)) {
-                                               SigBit bit = aiw_latches.at(i).first;
-                                               auto v = current[mapping[bit.wire]].bits.at(bit.offset);
-                                               if (v == State::S1)
-                                                       aiwfile << (aiw_latches.at(i).second ? '0' : '1');
-                                               else
-                                                       aiwfile << (aiw_latches.at(i).second ? '1' : '0');
+                                               aiwfile << '0';
                                                continue;
                                        }
                                        aiwfile << '\n';