&& case_read_READ_FMT_36_LOCK,
&& case_read_READ_FMT_37_MACHI_A,
&& case_read_READ_FMT_37_MACHI_A,
+ && case_read_READ_FMT_38_MACWHI,
+ && case_read_READ_FMT_38_MACWHI,
&& case_read_READ_FMT_0_ADD,
- && case_read_READ_FMT_38_MULHI_A,
- && case_read_READ_FMT_38_MULHI_A,
- && case_read_READ_FMT_39_MV,
- && case_read_READ_FMT_40_MVFACHI_A,
- && case_read_READ_FMT_40_MVFACHI_A,
- && case_read_READ_FMT_40_MVFACHI_A,
- && case_read_READ_FMT_41_MVFC,
- && case_read_READ_FMT_42_MVTACHI_A,
- && case_read_READ_FMT_42_MVTACHI_A,
- && case_read_READ_FMT_43_MVTC,
- && case_read_READ_FMT_39_MV,
- && case_read_READ_FMT_44_NOP,
- && case_read_READ_FMT_39_MV,
- && case_read_READ_FMT_45_RAC_DSI,
- && case_read_READ_FMT_45_RAC_DSI,
- && case_read_READ_FMT_46_RTE,
- && case_read_READ_FMT_47_SETH,
+ && case_read_READ_FMT_39_MULHI_A,
+ && case_read_READ_FMT_39_MULHI_A,
+ && case_read_READ_FMT_40_MULWHI,
+ && case_read_READ_FMT_40_MULWHI,
+ && case_read_READ_FMT_41_MV,
+ && case_read_READ_FMT_42_MVFACHI_A,
+ && case_read_READ_FMT_42_MVFACHI_A,
+ && case_read_READ_FMT_42_MVFACHI_A,
+ && case_read_READ_FMT_43_MVFC,
+ && case_read_READ_FMT_44_MVTACHI_A,
+ && case_read_READ_FMT_44_MVTACHI_A,
+ && case_read_READ_FMT_45_MVTC,
+ && case_read_READ_FMT_41_MV,
+ && case_read_READ_FMT_46_NOP,
+ && case_read_READ_FMT_41_MV,
+ && case_read_READ_FMT_47_RAC_DSI,
+ && case_read_READ_FMT_47_RAC_DSI,
+ && case_read_READ_FMT_48_RTE,
+ && case_read_READ_FMT_49_SETH,
&& case_read_READ_FMT_0_ADD,
- && case_read_READ_FMT_48_SLL3,
- && case_read_READ_FMT_49_SLLI,
+ && case_read_READ_FMT_50_SLL3,
+ && case_read_READ_FMT_51_SLLI,
&& case_read_READ_FMT_0_ADD,
- && case_read_READ_FMT_48_SLL3,
- && case_read_READ_FMT_49_SLLI,
+ && case_read_READ_FMT_50_SLL3,
+ && case_read_READ_FMT_51_SLLI,
&& case_read_READ_FMT_0_ADD,
- && case_read_READ_FMT_48_SLL3,
- && case_read_READ_FMT_49_SLLI,
- && case_read_READ_FMT_50_ST,
- && case_read_READ_FMT_51_ST_D,
- && case_read_READ_FMT_52_STB,
- && case_read_READ_FMT_53_STB_D,
- && case_read_READ_FMT_54_STH,
- && case_read_READ_FMT_55_STH_D,
- && case_read_READ_FMT_56_ST_PLUS,
- && case_read_READ_FMT_56_ST_PLUS,
+ && case_read_READ_FMT_50_SLL3,
+ && case_read_READ_FMT_51_SLLI,
+ && case_read_READ_FMT_52_ST,
+ && case_read_READ_FMT_53_ST_D,
+ && case_read_READ_FMT_54_STB,
+ && case_read_READ_FMT_55_STB_D,
+ && case_read_READ_FMT_56_STH,
+ && case_read_READ_FMT_57_STH_D,
+ && case_read_READ_FMT_58_ST_PLUS,
+ && case_read_READ_FMT_58_ST_PLUS,
&& case_read_READ_FMT_0_ADD,
&& case_read_READ_FMT_5_ADDV,
&& case_read_READ_FMT_7_ADDX,
- && case_read_READ_FMT_57_TRAP,
- && case_read_READ_FMT_58_UNLOCK,
- && case_read_READ_FMT_59_SATB,
- && case_read_READ_FMT_59_SATB,
- && case_read_READ_FMT_60_SAT,
+ && case_read_READ_FMT_59_TRAP,
+ && case_read_READ_FMT_60_UNLOCK,
+ && case_read_READ_FMT_61_SATB,
+ && case_read_READ_FMT_61_SATB,
+ && case_read_READ_FMT_62_SAT,
&& case_read_READ_FMT_21_CMPZ,
- && case_read_READ_FMT_61_SADD,
- && case_read_READ_FMT_62_MACWU1,
- && case_read_READ_FMT_63_MSBLO,
- && case_read_READ_FMT_64_MULWU1,
- && case_read_READ_FMT_62_MACWU1,
- && case_read_READ_FMT_65_SC,
- && case_read_READ_FMT_65_SC,
+ && case_read_READ_FMT_63_SADD,
+ && case_read_READ_FMT_64_MACWU1,
+ && case_read_READ_FMT_38_MACWHI,
+ && case_read_READ_FMT_65_MULWU1,
+ && case_read_READ_FMT_64_MACWU1,
+ && case_read_READ_FMT_66_SC,
+ && case_read_READ_FMT_66_SC,
0
};
extern DECODE *m32rx_decode_vars[];
}
BREAK (read);
- CASE (read, READ_FMT_1_ADD3) : /* e.g. add3 $dr,$sr,#$slo16 */
+ CASE (read, READ_FMT_1_ADD3) : /* e.g. add3 $dr,$sr,$hash$slo16 */
{
#define OPRND(f) par_exec->operands.fmt_1_add3.f
EXTRACT_FMT_1_ADD3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
}
BREAK (read);
- CASE (read, READ_FMT_2_AND3) : /* e.g. and3 $dr,$sr,#$uimm16 */
+ CASE (read, READ_FMT_2_AND3) : /* e.g. and3 $dr,$sr,$uimm16 */
{
#define OPRND(f) par_exec->operands.fmt_2_and3.f
EXTRACT_FMT_2_AND3_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
}
BREAK (read);
- CASE (read, READ_FMT_3_OR3) : /* e.g. or3 $dr,$sr,#$ulo16 */
+ CASE (read, READ_FMT_3_OR3) : /* e.g. or3 $dr,$sr,$hash$ulo16 */
{
#define OPRND(f) par_exec->operands.fmt_3_or3.f
EXTRACT_FMT_3_OR3_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
}
BREAK (read);
- CASE (read, READ_FMT_4_ADDI) : /* e.g. addi $dr,#$simm8 */
+ CASE (read, READ_FMT_4_ADDI) : /* e.g. addi $dr,$simm8 */
{
#define OPRND(f) par_exec->operands.fmt_4_addi.f
EXTRACT_FMT_4_ADDI_VARS /* f-op1 f-r1 f-simm8 */
}
BREAK (read);
- CASE (read, READ_FMT_6_ADDV3) : /* e.g. addv3 $dr,$sr,#$simm16 */
+ CASE (read, READ_FMT_6_ADDV3) : /* e.g. addv3 $dr,$sr,$simm16 */
{
#define OPRND(f) par_exec->operands.fmt_6_addv3.f
EXTRACT_FMT_6_ADDV3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
}
BREAK (read);
- CASE (read, READ_FMT_19_CMPI) : /* e.g. cmpi $src2,#$simm16 */
+ CASE (read, READ_FMT_19_CMPI) : /* e.g. cmpi $src2,$simm16 */
{
#define OPRND(f) par_exec->operands.fmt_19_cmpi.f
EXTRACT_FMT_19_CMPI_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
}
BREAK (read);
- CASE (read, READ_FMT_20_CMPUI) : /* e.g. cmpui $src2,#$uimm16 */
+ CASE (read, READ_FMT_20_CMPUI) : /* e.g. cmpui $src2,$uimm16 */
{
#define OPRND(f) par_exec->operands.fmt_20_cmpui.f
EXTRACT_FMT_20_CMPUI_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
}
BREAK (read);
- CASE (read, READ_FMT_33_LD24) : /* e.g. ld24 $dr,#$uimm24 */
+ CASE (read, READ_FMT_33_LD24) : /* e.g. ld24 $dr,$uimm24 */
{
#define OPRND(f) par_exec->operands.fmt_33_ld24.f
EXTRACT_FMT_33_LD24_VARS /* f-op1 f-r1 f-uimm24 */
}
BREAK (read);
- CASE (read, READ_FMT_34_LDI8) : /* e.g. ldi $dr,#$simm8 */
+ CASE (read, READ_FMT_34_LDI8) : /* e.g. ldi $dr,$simm8 */
{
#define OPRND(f) par_exec->operands.fmt_34_ldi8.f
EXTRACT_FMT_34_LDI8_VARS /* f-op1 f-r1 f-simm8 */
}
BREAK (read);
- CASE (read, READ_FMT_35_LDI16) : /* e.g. ldi $dr,$slo16 */
+ CASE (read, READ_FMT_35_LDI16) : /* e.g. ldi $dr,$hash$slo16 */
{
#define OPRND(f) par_exec->operands.fmt_35_ldi16.f
EXTRACT_FMT_35_LDI16_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
}
BREAK (read);
- CASE (read, READ_FMT_38_MULHI_A) : /* e.g. mulhi $src1,$src2,$acc */
+ CASE (read, READ_FMT_38_MACWHI) : /* e.g. macwhi $src1,$src2 */
{
-#define OPRND(f) par_exec->operands.fmt_38_mulhi_a.f
- EXTRACT_FMT_38_MULHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
- EXTRACT_FMT_38_MULHI_A_CODE
+#define OPRND(f) par_exec->operands.fmt_38_macwhi.f
+ EXTRACT_FMT_38_MACWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_38_MACWHI_CODE
/* Fetch the input operands for the semantic handler. */
+ OPRND (accum) = CPU (h_accum);
OPRND (src1) = CPU (h_gr[f_r1]);
OPRND (src2) = CPU (h_gr[f_r2]);
#undef OPRND
}
BREAK (read);
- CASE (read, READ_FMT_39_MV) : /* e.g. mv $dr,$sr */
+ CASE (read, READ_FMT_39_MULHI_A) : /* e.g. mulhi $src1,$src2,$acc */
{
-#define OPRND(f) par_exec->operands.fmt_39_mv.f
- EXTRACT_FMT_39_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_39_MV_CODE
+#define OPRND(f) par_exec->operands.fmt_39_mulhi_a.f
+ EXTRACT_FMT_39_MULHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
+ EXTRACT_FMT_39_MULHI_A_CODE
+
+ /* Fetch the input operands for the semantic handler. */
+ OPRND (src1) = CPU (h_gr[f_r1]);
+ OPRND (src2) = CPU (h_gr[f_r2]);
+#undef OPRND
+ }
+ BREAK (read);
+
+ CASE (read, READ_FMT_40_MULWHI) : /* e.g. mulwhi $src1,$src2 */
+ {
+#define OPRND(f) par_exec->operands.fmt_40_mulwhi.f
+ EXTRACT_FMT_40_MULWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_40_MULWHI_CODE
+
+ /* Fetch the input operands for the semantic handler. */
+ OPRND (src1) = CPU (h_gr[f_r1]);
+ OPRND (src2) = CPU (h_gr[f_r2]);
+#undef OPRND
+ }
+ BREAK (read);
+
+ CASE (read, READ_FMT_41_MV) : /* e.g. mv $dr,$sr */
+ {
+#define OPRND(f) par_exec->operands.fmt_41_mv.f
+ EXTRACT_FMT_41_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_41_MV_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (sr) = CPU (h_gr[f_r2]);
}
BREAK (read);
- CASE (read, READ_FMT_40_MVFACHI_A) : /* e.g. mvfachi $dr,$accs */
+ CASE (read, READ_FMT_42_MVFACHI_A) : /* e.g. mvfachi $dr,$accs */
{
-#define OPRND(f) par_exec->operands.fmt_40_mvfachi_a.f
- EXTRACT_FMT_40_MVFACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
- EXTRACT_FMT_40_MVFACHI_A_CODE
+#define OPRND(f) par_exec->operands.fmt_42_mvfachi_a.f
+ EXTRACT_FMT_42_MVFACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
+ EXTRACT_FMT_42_MVFACHI_A_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (accs) = m32rx_h_accums_get (current_cpu, f_accs);
}
BREAK (read);
- CASE (read, READ_FMT_41_MVFC) : /* e.g. mvfc $dr,$scr */
+ CASE (read, READ_FMT_43_MVFC) : /* e.g. mvfc $dr,$scr */
{
-#define OPRND(f) par_exec->operands.fmt_41_mvfc.f
- EXTRACT_FMT_41_MVFC_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_41_MVFC_CODE
+#define OPRND(f) par_exec->operands.fmt_43_mvfc.f
+ EXTRACT_FMT_43_MVFC_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_43_MVFC_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (scr) = m32rx_h_cr_get (current_cpu, f_r2);
}
BREAK (read);
- CASE (read, READ_FMT_42_MVTACHI_A) : /* e.g. mvtachi $src1,$accs */
+ CASE (read, READ_FMT_44_MVTACHI_A) : /* e.g. mvtachi $src1,$accs */
{
-#define OPRND(f) par_exec->operands.fmt_42_mvtachi_a.f
- EXTRACT_FMT_42_MVTACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
- EXTRACT_FMT_42_MVTACHI_A_CODE
+#define OPRND(f) par_exec->operands.fmt_44_mvtachi_a.f
+ EXTRACT_FMT_44_MVTACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
+ EXTRACT_FMT_44_MVTACHI_A_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (accs) = m32rx_h_accums_get (current_cpu, f_accs);
}
BREAK (read);
- CASE (read, READ_FMT_43_MVTC) : /* e.g. mvtc $sr,$dcr */
+ CASE (read, READ_FMT_45_MVTC) : /* e.g. mvtc $sr,$dcr */
{
-#define OPRND(f) par_exec->operands.fmt_43_mvtc.f
- EXTRACT_FMT_43_MVTC_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_43_MVTC_CODE
+#define OPRND(f) par_exec->operands.fmt_45_mvtc.f
+ EXTRACT_FMT_45_MVTC_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_45_MVTC_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (sr) = CPU (h_gr[f_r2]);
}
BREAK (read);
- CASE (read, READ_FMT_44_NOP) : /* e.g. nop */
+ CASE (read, READ_FMT_46_NOP) : /* e.g. nop */
{
-#define OPRND(f) par_exec->operands.fmt_44_nop.f
- EXTRACT_FMT_44_NOP_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_44_NOP_CODE
+#define OPRND(f) par_exec->operands.fmt_46_nop.f
+ EXTRACT_FMT_46_NOP_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_46_NOP_CODE
/* Fetch the input operands for the semantic handler. */
#undef OPRND
}
BREAK (read);
- CASE (read, READ_FMT_45_RAC_DSI) : /* e.g. rac $accd,$accs,#$imm1 */
+ CASE (read, READ_FMT_47_RAC_DSI) : /* e.g. rac $accd,$accs,$imm1 */
{
-#define OPRND(f) par_exec->operands.fmt_45_rac_dsi.f
- EXTRACT_FMT_45_RAC_DSI_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */
- EXTRACT_FMT_45_RAC_DSI_CODE
+#define OPRND(f) par_exec->operands.fmt_47_rac_dsi.f
+ EXTRACT_FMT_47_RAC_DSI_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */
+ EXTRACT_FMT_47_RAC_DSI_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (accs) = m32rx_h_accums_get (current_cpu, f_accs);
}
BREAK (read);
- CASE (read, READ_FMT_46_RTE) : /* e.g. rte */
+ CASE (read, READ_FMT_48_RTE) : /* e.g. rte */
{
-#define OPRND(f) par_exec->operands.fmt_46_rte.f
- EXTRACT_FMT_46_RTE_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_46_RTE_CODE
+#define OPRND(f) par_exec->operands.fmt_48_rte.f
+ EXTRACT_FMT_48_RTE_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_48_RTE_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (h_bcond_0) = CPU (h_bcond);
}
BREAK (read);
- CASE (read, READ_FMT_47_SETH) : /* e.g. seth $dr,#$hi16 */
+ CASE (read, READ_FMT_49_SETH) : /* e.g. seth $dr,$hash$hi16 */
{
-#define OPRND(f) par_exec->operands.fmt_47_seth.f
- EXTRACT_FMT_47_SETH_VARS /* f-op1 f-r1 f-op2 f-r2 f-hi16 */
- EXTRACT_FMT_47_SETH_CODE
+#define OPRND(f) par_exec->operands.fmt_49_seth.f
+ EXTRACT_FMT_49_SETH_VARS /* f-op1 f-r1 f-op2 f-r2 f-hi16 */
+ EXTRACT_FMT_49_SETH_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (hi16) = f_hi16;
}
BREAK (read);
- CASE (read, READ_FMT_48_SLL3) : /* e.g. sll3 $dr,$sr,#$simm16 */
+ CASE (read, READ_FMT_50_SLL3) : /* e.g. sll3 $dr,$sr,$simm16 */
{
-#define OPRND(f) par_exec->operands.fmt_48_sll3.f
- EXTRACT_FMT_48_SLL3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_48_SLL3_CODE
+#define OPRND(f) par_exec->operands.fmt_50_sll3.f
+ EXTRACT_FMT_50_SLL3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_FMT_50_SLL3_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (simm16) = f_simm16;
}
BREAK (read);
- CASE (read, READ_FMT_49_SLLI) : /* e.g. slli $dr,#$uimm5 */
+ CASE (read, READ_FMT_51_SLLI) : /* e.g. slli $dr,$uimm5 */
{
-#define OPRND(f) par_exec->operands.fmt_49_slli.f
- EXTRACT_FMT_49_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
- EXTRACT_FMT_49_SLLI_CODE
+#define OPRND(f) par_exec->operands.fmt_51_slli.f
+ EXTRACT_FMT_51_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
+ EXTRACT_FMT_51_SLLI_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (dr) = CPU (h_gr[f_r1]);
}
BREAK (read);
- CASE (read, READ_FMT_50_ST) : /* e.g. st $src1,@$src2 */
+ CASE (read, READ_FMT_52_ST) : /* e.g. st $src1,@$src2 */
{
-#define OPRND(f) par_exec->operands.fmt_50_st.f
- EXTRACT_FMT_50_ST_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_50_ST_CODE
+#define OPRND(f) par_exec->operands.fmt_52_st.f
+ EXTRACT_FMT_52_ST_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_52_ST_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (src1) = CPU (h_gr[f_r1]);
}
BREAK (read);
- CASE (read, READ_FMT_51_ST_D) : /* e.g. st $src1,@($slo16,$src2) */
+ CASE (read, READ_FMT_53_ST_D) : /* e.g. st $src1,@($slo16,$src2) */
{
-#define OPRND(f) par_exec->operands.fmt_51_st_d.f
- EXTRACT_FMT_51_ST_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_51_ST_D_CODE
+#define OPRND(f) par_exec->operands.fmt_53_st_d.f
+ EXTRACT_FMT_53_ST_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_FMT_53_ST_D_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (slo16) = f_simm16;
}
BREAK (read);
- CASE (read, READ_FMT_52_STB) : /* e.g. stb $src1,@$src2 */
+ CASE (read, READ_FMT_54_STB) : /* e.g. stb $src1,@$src2 */
{
-#define OPRND(f) par_exec->operands.fmt_52_stb.f
- EXTRACT_FMT_52_STB_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_52_STB_CODE
+#define OPRND(f) par_exec->operands.fmt_54_stb.f
+ EXTRACT_FMT_54_STB_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_54_STB_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (src1) = CPU (h_gr[f_r1]);
}
BREAK (read);
- CASE (read, READ_FMT_53_STB_D) : /* e.g. stb $src1,@($slo16,$src2) */
+ CASE (read, READ_FMT_55_STB_D) : /* e.g. stb $src1,@($slo16,$src2) */
{
-#define OPRND(f) par_exec->operands.fmt_53_stb_d.f
- EXTRACT_FMT_53_STB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_53_STB_D_CODE
+#define OPRND(f) par_exec->operands.fmt_55_stb_d.f
+ EXTRACT_FMT_55_STB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_FMT_55_STB_D_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (slo16) = f_simm16;
}
BREAK (read);
- CASE (read, READ_FMT_54_STH) : /* e.g. sth $src1,@$src2 */
+ CASE (read, READ_FMT_56_STH) : /* e.g. sth $src1,@$src2 */
{
-#define OPRND(f) par_exec->operands.fmt_54_sth.f
- EXTRACT_FMT_54_STH_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_54_STH_CODE
+#define OPRND(f) par_exec->operands.fmt_56_sth.f
+ EXTRACT_FMT_56_STH_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_56_STH_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (src1) = CPU (h_gr[f_r1]);
}
BREAK (read);
- CASE (read, READ_FMT_55_STH_D) : /* e.g. sth $src1,@($slo16,$src2) */
+ CASE (read, READ_FMT_57_STH_D) : /* e.g. sth $src1,@($slo16,$src2) */
{
-#define OPRND(f) par_exec->operands.fmt_55_sth_d.f
- EXTRACT_FMT_55_STH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_55_STH_D_CODE
+#define OPRND(f) par_exec->operands.fmt_57_sth_d.f
+ EXTRACT_FMT_57_STH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_FMT_57_STH_D_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (slo16) = f_simm16;
}
BREAK (read);
- CASE (read, READ_FMT_56_ST_PLUS) : /* e.g. st $src1,@+$src2 */
+ CASE (read, READ_FMT_58_ST_PLUS) : /* e.g. st $src1,@+$src2 */
{
-#define OPRND(f) par_exec->operands.fmt_56_st_plus.f
- EXTRACT_FMT_56_ST_PLUS_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_56_ST_PLUS_CODE
+#define OPRND(f) par_exec->operands.fmt_58_st_plus.f
+ EXTRACT_FMT_58_ST_PLUS_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_58_ST_PLUS_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (src1) = CPU (h_gr[f_r1]);
}
BREAK (read);
- CASE (read, READ_FMT_57_TRAP) : /* e.g. trap #$uimm4 */
+ CASE (read, READ_FMT_59_TRAP) : /* e.g. trap $uimm4 */
{
-#define OPRND(f) par_exec->operands.fmt_57_trap.f
- EXTRACT_FMT_57_TRAP_VARS /* f-op1 f-r1 f-op2 f-uimm4 */
- EXTRACT_FMT_57_TRAP_CODE
+#define OPRND(f) par_exec->operands.fmt_59_trap.f
+ EXTRACT_FMT_59_TRAP_VARS /* f-op1 f-r1 f-op2 f-uimm4 */
+ EXTRACT_FMT_59_TRAP_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (pc) = CPU (h_pc);
}
BREAK (read);
- CASE (read, READ_FMT_58_UNLOCK) : /* e.g. unlock $src1,@$src2 */
+ CASE (read, READ_FMT_60_UNLOCK) : /* e.g. unlock $src1,@$src2 */
{
-#define OPRND(f) par_exec->operands.fmt_58_unlock.f
- EXTRACT_FMT_58_UNLOCK_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_58_UNLOCK_CODE
+#define OPRND(f) par_exec->operands.fmt_60_unlock.f
+ EXTRACT_FMT_60_UNLOCK_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_60_UNLOCK_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (h_lock_0) = CPU (h_lock);
}
BREAK (read);
- CASE (read, READ_FMT_59_SATB) : /* e.g. satb $dr,$sr */
+ CASE (read, READ_FMT_61_SATB) : /* e.g. satb $dr,$sr */
{
-#define OPRND(f) par_exec->operands.fmt_59_satb.f
- EXTRACT_FMT_59_SATB_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
- EXTRACT_FMT_59_SATB_CODE
+#define OPRND(f) par_exec->operands.fmt_61_satb.f
+ EXTRACT_FMT_61_SATB_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
+ EXTRACT_FMT_61_SATB_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (sr) = CPU (h_gr[f_r2]);
}
BREAK (read);
- CASE (read, READ_FMT_60_SAT) : /* e.g. sat $dr,$sr */
+ CASE (read, READ_FMT_62_SAT) : /* e.g. sat $dr,$sr */
{
-#define OPRND(f) par_exec->operands.fmt_60_sat.f
- EXTRACT_FMT_60_SAT_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
- EXTRACT_FMT_60_SAT_CODE
+#define OPRND(f) par_exec->operands.fmt_62_sat.f
+ EXTRACT_FMT_62_SAT_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
+ EXTRACT_FMT_62_SAT_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (condbit) = CPU (h_cond);
}
BREAK (read);
- CASE (read, READ_FMT_61_SADD) : /* e.g. sadd */
+ CASE (read, READ_FMT_63_SADD) : /* e.g. sadd */
{
-#define OPRND(f) par_exec->operands.fmt_61_sadd.f
- EXTRACT_FMT_61_SADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_61_SADD_CODE
+#define OPRND(f) par_exec->operands.fmt_63_sadd.f
+ EXTRACT_FMT_63_SADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_63_SADD_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (h_accums_0) = m32rx_h_accums_get (current_cpu, 0);
}
BREAK (read);
- CASE (read, READ_FMT_62_MACWU1) : /* e.g. macwu1 $src1,$src2 */
+ CASE (read, READ_FMT_64_MACWU1) : /* e.g. macwu1 $src1,$src2 */
{
-#define OPRND(f) par_exec->operands.fmt_62_macwu1.f
- EXTRACT_FMT_62_MACWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_62_MACWU1_CODE
+#define OPRND(f) par_exec->operands.fmt_64_macwu1.f
+ EXTRACT_FMT_64_MACWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_64_MACWU1_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (h_accums_1) = m32rx_h_accums_get (current_cpu, 1);
}
BREAK (read);
- CASE (read, READ_FMT_63_MSBLO) : /* e.g. msblo $src1,$src2 */
- {
-#define OPRND(f) par_exec->operands.fmt_63_msblo.f
- EXTRACT_FMT_63_MSBLO_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_63_MSBLO_CODE
-
- /* Fetch the input operands for the semantic handler. */
- OPRND (accum) = CPU (h_accum);
- OPRND (src1) = CPU (h_gr[f_r1]);
- OPRND (src2) = CPU (h_gr[f_r2]);
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_64_MULWU1) : /* e.g. mulwu1 $src1,$src2 */
+ CASE (read, READ_FMT_65_MULWU1) : /* e.g. mulwu1 $src1,$src2 */
{
-#define OPRND(f) par_exec->operands.fmt_64_mulwu1.f
- EXTRACT_FMT_64_MULWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_64_MULWU1_CODE
+#define OPRND(f) par_exec->operands.fmt_65_mulwu1.f
+ EXTRACT_FMT_65_MULWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_65_MULWU1_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (src1) = CPU (h_gr[f_r1]);
}
BREAK (read);
- CASE (read, READ_FMT_65_SC) : /* e.g. sc */
+ CASE (read, READ_FMT_66_SC) : /* e.g. sc */
{
-#define OPRND(f) par_exec->operands.fmt_65_sc.f
- EXTRACT_FMT_65_SC_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_65_SC_CODE
+#define OPRND(f) par_exec->operands.fmt_66_sc.f
+ EXTRACT_FMT_66_SC_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_66_SC_CODE
/* Fetch the input operands for the semantic handler. */
OPRND (condbit) = CPU (h_cond);
#undef OPRND
}
-/* Perform add3: add3 $dr,$sr,#$slo16. */
+/* Perform add3: add3 $dr,$sr,$hash$slo16. */
CIA
SEM_FN_NAME (m32rx,add3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
#undef OPRND
}
-/* Perform and3: and3 $dr,$sr,#$uimm16. */
+/* Perform and3: and3 $dr,$sr,$uimm16. */
CIA
SEM_FN_NAME (m32rx,and3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
#undef OPRND
}
-/* Perform or3: or3 $dr,$sr,#$ulo16. */
+/* Perform or3: or3 $dr,$sr,$hash$ulo16. */
CIA
SEM_FN_NAME (m32rx,or3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
#undef OPRND
}
-/* Perform xor3: xor3 $dr,$sr,#$uimm16. */
+/* Perform xor3: xor3 $dr,$sr,$uimm16. */
CIA
SEM_FN_NAME (m32rx,xor3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
#undef OPRND
}
-/* Perform addi: addi $dr,#$simm8. */
+/* Perform addi: addi $dr,$simm8. */
CIA
SEM_FN_NAME (m32rx,addi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
#undef OPRND
}
-/* Perform addv3: addv3 $dr,$sr,#$simm16. */
+/* Perform addv3: addv3 $dr,$sr,$simm16. */
CIA
SEM_FN_NAME (m32rx,addv3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
#undef OPRND
}
-/* Perform cmpi: cmpi $src2,#$simm16. */
+/* Perform cmpi: cmpi $src2,$simm16. */
CIA
SEM_FN_NAME (m32rx,cmpi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
#undef OPRND
}
-/* Perform cmpui: cmpui $src2,#$uimm16. */
+/* Perform cmpui: cmpui $src2,$uimm16. */
CIA
SEM_FN_NAME (m32rx,cmpui) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
#undef OPRND
}
-/* Perform ld24: ld24 $dr,#$uimm24. */
+/* Perform ld24: ld24 $dr,$uimm24. */
CIA
SEM_FN_NAME (m32rx,ld24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
#undef OPRND
}
-/* Perform ldi8: ldi $dr,#$simm8. */
+/* Perform ldi8: ldi $dr,$simm8. */
CIA
SEM_FN_NAME (m32rx,ldi8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
#undef OPRND
}
-/* Perform ldi16: ldi $dr,$slo16. */
+/* Perform ldi16: ldi $dr,$hash$slo16. */
CIA
SEM_FN_NAME (m32rx,ldi16) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
#undef OPRND
}
+/* Perform macwhi: macwhi $src1,$src2. */
+CIA
+SEM_FN_NAME (m32rx,macwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
+{
+ insn_t insn = SEM_INSN (sem_arg);
+#define OPRND(f) par_exec->operands.fmt_38_macwhi.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
+ EXTRACT_FMT_38_MACWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_38_MACWHI_CODE
+
+ CPU (h_accum) = SRADI (SLLDI (ADDDI (OPRND (accum), MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (SRASI (OPRND (src2), 16))))), 8), 8);
+ TRACE_RESULT (current_cpu, "accum", 'D', CPU (h_accum));
+
+#if WITH_PROFILE_MODEL_P
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ m32rx_model_mark_get_h_gr (current_cpu, abuf);
+ m32rx_model_profile_insn (current_cpu, abuf);
+ }
+#endif
+
+ return new_pc;
+#undef OPRND
+}
+
+/* Perform macwlo: macwlo $src1,$src2. */
+CIA
+SEM_FN_NAME (m32rx,macwlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
+{
+ insn_t insn = SEM_INSN (sem_arg);
+#define OPRND(f) par_exec->operands.fmt_38_macwhi.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
+ EXTRACT_FMT_38_MACWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_38_MACWHI_CODE
+
+ CPU (h_accum) = SRADI (SLLDI (ADDDI (OPRND (accum), MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (OPRND (src2))))), 8), 8);
+ TRACE_RESULT (current_cpu, "accum", 'D', CPU (h_accum));
+
+#if WITH_PROFILE_MODEL_P
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ m32rx_model_mark_get_h_gr (current_cpu, abuf);
+ m32rx_model_profile_insn (current_cpu, abuf);
+ }
+#endif
+
+ return new_pc;
+#undef OPRND
+}
+
/* Perform mul: mul $dr,$sr. */
CIA
SEM_FN_NAME (m32rx,mul) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
SEM_FN_NAME (m32rx,mulhi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_38_mulhi_a.f
+#define OPRND(f) par_exec->operands.fmt_39_mulhi_a.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- EXTRACT_FMT_38_MULHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
- EXTRACT_FMT_38_MULHI_A_CODE
+ EXTRACT_FMT_39_MULHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
+ EXTRACT_FMT_39_MULHI_A_CODE
m32rx_h_accums_set (current_cpu, f_acc, SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (OPRND (src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (OPRND (src2), 16)))), 16), 16));
TRACE_RESULT (current_cpu, "acc", 'D', m32rx_h_accums_get (current_cpu, f_acc));
SEM_FN_NAME (m32rx,mullo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_38_mulhi_a.f
+#define OPRND(f) par_exec->operands.fmt_39_mulhi_a.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- EXTRACT_FMT_38_MULHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
- EXTRACT_FMT_38_MULHI_A_CODE
+ EXTRACT_FMT_39_MULHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
+ EXTRACT_FMT_39_MULHI_A_CODE
m32rx_h_accums_set (current_cpu, f_acc, SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (OPRND (src1), 16)), EXTHIDI (TRUNCSIHI (OPRND (src2)))), 16), 16));
TRACE_RESULT (current_cpu, "acc", 'D', m32rx_h_accums_get (current_cpu, f_acc));
#undef OPRND
}
+/* Perform mulwhi: mulwhi $src1,$src2. */
+CIA
+SEM_FN_NAME (m32rx,mulwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
+{
+ insn_t insn = SEM_INSN (sem_arg);
+#define OPRND(f) par_exec->operands.fmt_40_mulwhi.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
+ EXTRACT_FMT_40_MULWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_40_MULWHI_CODE
+
+ CPU (h_accum) = SRADI (SLLDI (MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (SRASI (OPRND (src2), 16)))), 8), 8);
+ TRACE_RESULT (current_cpu, "accum", 'D', CPU (h_accum));
+
+#if WITH_PROFILE_MODEL_P
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ m32rx_model_mark_get_h_gr (current_cpu, abuf);
+ m32rx_model_profile_insn (current_cpu, abuf);
+ }
+#endif
+
+ return new_pc;
+#undef OPRND
+}
+
+/* Perform mulwlo: mulwlo $src1,$src2. */
+CIA
+SEM_FN_NAME (m32rx,mulwlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
+{
+ insn_t insn = SEM_INSN (sem_arg);
+#define OPRND(f) par_exec->operands.fmt_40_mulwhi.f
+ ARGBUF *abuf = SEM_ARGBUF (sem_arg);
+ CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
+ EXTRACT_FMT_40_MULWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_40_MULWHI_CODE
+
+ CPU (h_accum) = SRADI (SLLDI (MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (OPRND (src2)))), 8), 8);
+ TRACE_RESULT (current_cpu, "accum", 'D', CPU (h_accum));
+
+#if WITH_PROFILE_MODEL_P
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ m32rx_model_mark_get_h_gr (current_cpu, abuf);
+ m32rx_model_profile_insn (current_cpu, abuf);
+ }
+#endif
+
+ return new_pc;
+#undef OPRND
+}
+
/* Perform mv: mv $dr,$sr. */
CIA
SEM_FN_NAME (m32rx,mv) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_39_mv.f
+#define OPRND(f) par_exec->operands.fmt_41_mv.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- EXTRACT_FMT_39_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_39_MV_CODE
+ EXTRACT_FMT_41_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_41_MV_CODE
CPU (h_gr[f_r1]) = OPRND (sr);
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
SEM_FN_NAME (m32rx,mvfachi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_40_mvfachi_a.f
+#define OPRND(f) par_exec->operands.fmt_42_mvfachi_a.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- EXTRACT_FMT_40_MVFACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
- EXTRACT_FMT_40_MVFACHI_A_CODE
+ EXTRACT_FMT_42_MVFACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
+ EXTRACT_FMT_42_MVFACHI_A_CODE
CPU (h_gr[f_r1]) = TRUNCDISI (SRADI (OPRND (accs), 32));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
SEM_FN_NAME (m32rx,mvfaclo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_40_mvfachi_a.f
+#define OPRND(f) par_exec->operands.fmt_42_mvfachi_a.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- EXTRACT_FMT_40_MVFACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
- EXTRACT_FMT_40_MVFACHI_A_CODE
+ EXTRACT_FMT_42_MVFACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
+ EXTRACT_FMT_42_MVFACHI_A_CODE
CPU (h_gr[f_r1]) = TRUNCDISI (OPRND (accs));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
SEM_FN_NAME (m32rx,mvfacmi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_40_mvfachi_a.f
+#define OPRND(f) par_exec->operands.fmt_42_mvfachi_a.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- EXTRACT_FMT_40_MVFACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
- EXTRACT_FMT_40_MVFACHI_A_CODE
+ EXTRACT_FMT_42_MVFACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
+ EXTRACT_FMT_42_MVFACHI_A_CODE
CPU (h_gr[f_r1]) = TRUNCDISI (SRADI (OPRND (accs), 16));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
SEM_FN_NAME (m32rx,mvfc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_41_mvfc.f
+#define OPRND(f) par_exec->operands.fmt_43_mvfc.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- EXTRACT_FMT_41_MVFC_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_41_MVFC_CODE
+ EXTRACT_FMT_43_MVFC_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_43_MVFC_CODE
CPU (h_gr[f_r1]) = OPRND (scr);
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
SEM_FN_NAME (m32rx,mvtachi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_42_mvtachi_a.f
+#define OPRND(f) par_exec->operands.fmt_44_mvtachi_a.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- EXTRACT_FMT_42_MVTACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
- EXTRACT_FMT_42_MVTACHI_A_CODE
+ EXTRACT_FMT_44_MVTACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
+ EXTRACT_FMT_44_MVTACHI_A_CODE
m32rx_h_accums_set (current_cpu, f_accs, ORDI (ANDDI (OPRND (accs), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (OPRND (src1)), 32)));
TRACE_RESULT (current_cpu, "accs", 'D', m32rx_h_accums_get (current_cpu, f_accs));
SEM_FN_NAME (m32rx,mvtaclo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_42_mvtachi_a.f
+#define OPRND(f) par_exec->operands.fmt_44_mvtachi_a.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- EXTRACT_FMT_42_MVTACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
- EXTRACT_FMT_42_MVTACHI_A_CODE
+ EXTRACT_FMT_44_MVTACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
+ EXTRACT_FMT_44_MVTACHI_A_CODE
m32rx_h_accums_set (current_cpu, f_accs, ORDI (ANDDI (OPRND (accs), MAKEDI (0xffffffff, 0)), ZEXTSIDI (OPRND (src1))));
TRACE_RESULT (current_cpu, "accs", 'D', m32rx_h_accums_get (current_cpu, f_accs));
SEM_FN_NAME (m32rx,mvtc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_43_mvtc.f
+#define OPRND(f) par_exec->operands.fmt_45_mvtc.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- EXTRACT_FMT_43_MVTC_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_43_MVTC_CODE
+ EXTRACT_FMT_45_MVTC_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_45_MVTC_CODE
m32rx_h_cr_set (current_cpu, f_r1, OPRND (sr));
TRACE_RESULT (current_cpu, "dcr", 'x', m32rx_h_cr_get (current_cpu, f_r1));
SEM_FN_NAME (m32rx,neg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_39_mv.f
+#define OPRND(f) par_exec->operands.fmt_41_mv.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- EXTRACT_FMT_39_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_39_MV_CODE
+ EXTRACT_FMT_41_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_41_MV_CODE
CPU (h_gr[f_r1]) = NEGSI (OPRND (sr));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
SEM_FN_NAME (m32rx,nop) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_44_nop.f
+#define OPRND(f) par_exec->operands.fmt_46_nop.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- EXTRACT_FMT_44_NOP_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_44_NOP_CODE
+ EXTRACT_FMT_46_NOP_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_46_NOP_CODE
PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr);
SEM_FN_NAME (m32rx,not) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_39_mv.f
+#define OPRND(f) par_exec->operands.fmt_41_mv.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- EXTRACT_FMT_39_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_39_MV_CODE
+ EXTRACT_FMT_41_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_41_MV_CODE
CPU (h_gr[f_r1]) = INVSI (OPRND (sr));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
#undef OPRND
}
-/* Perform rac-dsi: rac $accd,$accs,#$imm1. */
+/* Perform rac-dsi: rac $accd,$accs,$imm1. */
CIA
SEM_FN_NAME (m32rx,rac_dsi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_45_rac_dsi.f
+#define OPRND(f) par_exec->operands.fmt_47_rac_dsi.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- EXTRACT_FMT_45_RAC_DSI_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */
- EXTRACT_FMT_45_RAC_DSI_CODE
+ EXTRACT_FMT_47_RAC_DSI_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */
+ EXTRACT_FMT_47_RAC_DSI_CODE
do {
DI tmp_tmp1;
#undef OPRND
}
-/* Perform rach-dsi: rach $accd,$accs,#$imm1. */
+/* Perform rach-dsi: rach $accd,$accs,$imm1. */
CIA
SEM_FN_NAME (m32rx,rach_dsi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_45_rac_dsi.f
+#define OPRND(f) par_exec->operands.fmt_47_rac_dsi.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- EXTRACT_FMT_45_RAC_DSI_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */
- EXTRACT_FMT_45_RAC_DSI_CODE
+ EXTRACT_FMT_47_RAC_DSI_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */
+ EXTRACT_FMT_47_RAC_DSI_CODE
do {
DI tmp_tmp1;
SEM_FN_NAME (m32rx,rte) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_46_rte.f
+#define OPRND(f) par_exec->operands.fmt_48_rte.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
int taken_p = 0;
- EXTRACT_FMT_46_RTE_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_46_RTE_CODE
+ EXTRACT_FMT_48_RTE_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_48_RTE_CODE
do {
CPU (h_sm) = OPRND (h_bsm_0);
#undef OPRND
}
-/* Perform seth: seth $dr,#$hi16. */
+/* Perform seth: seth $dr,$hash$hi16. */
CIA
SEM_FN_NAME (m32rx,seth) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_47_seth.f
+#define OPRND(f) par_exec->operands.fmt_49_seth.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- EXTRACT_FMT_47_SETH_VARS /* f-op1 f-r1 f-op2 f-r2 f-hi16 */
- EXTRACT_FMT_47_SETH_CODE
+ EXTRACT_FMT_49_SETH_VARS /* f-op1 f-r1 f-op2 f-r2 f-hi16 */
+ EXTRACT_FMT_49_SETH_CODE
CPU (h_gr[f_r1]) = SLLSI (OPRND (hi16), 16);
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
#undef OPRND
}
-/* Perform sll3: sll3 $dr,$sr,#$simm16. */
+/* Perform sll3: sll3 $dr,$sr,$simm16. */
CIA
SEM_FN_NAME (m32rx,sll3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_48_sll3.f
+#define OPRND(f) par_exec->operands.fmt_50_sll3.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- EXTRACT_FMT_48_SLL3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_48_SLL3_CODE
+ EXTRACT_FMT_50_SLL3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_FMT_50_SLL3_CODE
CPU (h_gr[f_r1]) = SLLSI (OPRND (sr), ANDSI (OPRND (simm16), 31));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
#undef OPRND
}
-/* Perform slli: slli $dr,#$uimm5. */
+/* Perform slli: slli $dr,$uimm5. */
CIA
SEM_FN_NAME (m32rx,slli) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_49_slli.f
+#define OPRND(f) par_exec->operands.fmt_51_slli.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- EXTRACT_FMT_49_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
- EXTRACT_FMT_49_SLLI_CODE
+ EXTRACT_FMT_51_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
+ EXTRACT_FMT_51_SLLI_CODE
CPU (h_gr[f_r1]) = SLLSI (OPRND (dr), OPRND (uimm5));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
#undef OPRND
}
-/* Perform sra3: sra3 $dr,$sr,#$simm16. */
+/* Perform sra3: sra3 $dr,$sr,$simm16. */
CIA
SEM_FN_NAME (m32rx,sra3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_48_sll3.f
+#define OPRND(f) par_exec->operands.fmt_50_sll3.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- EXTRACT_FMT_48_SLL3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_48_SLL3_CODE
+ EXTRACT_FMT_50_SLL3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_FMT_50_SLL3_CODE
CPU (h_gr[f_r1]) = SRASI (OPRND (sr), ANDSI (OPRND (simm16), 31));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
#undef OPRND
}
-/* Perform srai: srai $dr,#$uimm5. */
+/* Perform srai: srai $dr,$uimm5. */
CIA
SEM_FN_NAME (m32rx,srai) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_49_slli.f
+#define OPRND(f) par_exec->operands.fmt_51_slli.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- EXTRACT_FMT_49_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
- EXTRACT_FMT_49_SLLI_CODE
+ EXTRACT_FMT_51_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
+ EXTRACT_FMT_51_SLLI_CODE
CPU (h_gr[f_r1]) = SRASI (OPRND (dr), OPRND (uimm5));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
#undef OPRND
}
-/* Perform srl3: srl3 $dr,$sr,#$simm16. */
+/* Perform srl3: srl3 $dr,$sr,$simm16. */
CIA
SEM_FN_NAME (m32rx,srl3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_48_sll3.f
+#define OPRND(f) par_exec->operands.fmt_50_sll3.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- EXTRACT_FMT_48_SLL3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_48_SLL3_CODE
+ EXTRACT_FMT_50_SLL3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_FMT_50_SLL3_CODE
CPU (h_gr[f_r1]) = SRLSI (OPRND (sr), ANDSI (OPRND (simm16), 31));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
#undef OPRND
}
-/* Perform srli: srli $dr,#$uimm5. */
+/* Perform srli: srli $dr,$uimm5. */
CIA
SEM_FN_NAME (m32rx,srli) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_49_slli.f
+#define OPRND(f) par_exec->operands.fmt_51_slli.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- EXTRACT_FMT_49_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
- EXTRACT_FMT_49_SLLI_CODE
+ EXTRACT_FMT_51_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
+ EXTRACT_FMT_51_SLLI_CODE
CPU (h_gr[f_r1]) = SRLSI (OPRND (dr), OPRND (uimm5));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
SEM_FN_NAME (m32rx,st) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_50_st.f
+#define OPRND(f) par_exec->operands.fmt_52_st.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- EXTRACT_FMT_50_ST_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_50_ST_CODE
+ EXTRACT_FMT_52_ST_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_52_ST_CODE
SETMEMSI (current_cpu, OPRND (src2), OPRND (src1));
TRACE_RESULT (current_cpu, "h-memory-src2", 'x', GETMEMSI (current_cpu, OPRND (src2)));
SEM_FN_NAME (m32rx,st_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_51_st_d.f
+#define OPRND(f) par_exec->operands.fmt_53_st_d.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- EXTRACT_FMT_51_ST_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_51_ST_D_CODE
+ EXTRACT_FMT_53_ST_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_FMT_53_ST_D_CODE
SETMEMSI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16)), OPRND (src1));
TRACE_RESULT (current_cpu, "h-memory-add-WI-src2-slo16", 'x', GETMEMSI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16))));
SEM_FN_NAME (m32rx,stb) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_52_stb.f
+#define OPRND(f) par_exec->operands.fmt_54_stb.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- EXTRACT_FMT_52_STB_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_52_STB_CODE
+ EXTRACT_FMT_54_STB_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_54_STB_CODE
SETMEMQI (current_cpu, OPRND (src2), OPRND (src1));
TRACE_RESULT (current_cpu, "h-memory-src2", 'x', GETMEMQI (current_cpu, OPRND (src2)));
SEM_FN_NAME (m32rx,stb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_53_stb_d.f
+#define OPRND(f) par_exec->operands.fmt_55_stb_d.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- EXTRACT_FMT_53_STB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_53_STB_D_CODE
+ EXTRACT_FMT_55_STB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_FMT_55_STB_D_CODE
SETMEMQI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16)), OPRND (src1));
TRACE_RESULT (current_cpu, "h-memory-add-WI-src2-slo16", 'x', GETMEMQI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16))));
SEM_FN_NAME (m32rx,sth) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_54_sth.f
+#define OPRND(f) par_exec->operands.fmt_56_sth.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- EXTRACT_FMT_54_STH_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_54_STH_CODE
+ EXTRACT_FMT_56_STH_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_56_STH_CODE
SETMEMHI (current_cpu, OPRND (src2), OPRND (src1));
TRACE_RESULT (current_cpu, "h-memory-src2", 'x', GETMEMHI (current_cpu, OPRND (src2)));
SEM_FN_NAME (m32rx,sth_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_55_sth_d.f
+#define OPRND(f) par_exec->operands.fmt_57_sth_d.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- EXTRACT_FMT_55_STH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_55_STH_D_CODE
+ EXTRACT_FMT_57_STH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+ EXTRACT_FMT_57_STH_D_CODE
SETMEMHI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16)), OPRND (src1));
TRACE_RESULT (current_cpu, "h-memory-add-WI-src2-slo16", 'x', GETMEMHI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16))));
SEM_FN_NAME (m32rx,st_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_56_st_plus.f
+#define OPRND(f) par_exec->operands.fmt_58_st_plus.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- EXTRACT_FMT_56_ST_PLUS_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_56_ST_PLUS_CODE
+ EXTRACT_FMT_58_ST_PLUS_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_58_ST_PLUS_CODE
do {
SI tmp_new_src2;
SEM_FN_NAME (m32rx,st_minus) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_56_st_plus.f
+#define OPRND(f) par_exec->operands.fmt_58_st_plus.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- EXTRACT_FMT_56_ST_PLUS_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_56_ST_PLUS_CODE
+ EXTRACT_FMT_58_ST_PLUS_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_58_ST_PLUS_CODE
do {
SI tmp_new_src2;
#undef OPRND
}
-/* Perform trap: trap #$uimm4. */
+/* Perform trap: trap $uimm4. */
CIA
SEM_FN_NAME (m32rx,trap) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_57_trap.f
+#define OPRND(f) par_exec->operands.fmt_59_trap.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
int taken_p = 0;
- EXTRACT_FMT_57_TRAP_VARS /* f-op1 f-r1 f-op2 f-uimm4 */
- EXTRACT_FMT_57_TRAP_CODE
+ EXTRACT_FMT_59_TRAP_VARS /* f-op1 f-r1 f-op2 f-uimm4 */
+ EXTRACT_FMT_59_TRAP_CODE
do {
m32rx_h_cr_set (current_cpu, 6, ADDSI (OPRND (pc), 4));
SEM_FN_NAME (m32rx,unlock) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_58_unlock.f
+#define OPRND(f) par_exec->operands.fmt_60_unlock.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- EXTRACT_FMT_58_UNLOCK_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_58_UNLOCK_CODE
+ EXTRACT_FMT_60_UNLOCK_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_60_UNLOCK_CODE
do {
if (OPRND (h_lock_0)) {
SEM_FN_NAME (m32rx,satb) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_59_satb.f
+#define OPRND(f) par_exec->operands.fmt_61_satb.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- EXTRACT_FMT_59_SATB_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
- EXTRACT_FMT_59_SATB_CODE
+ EXTRACT_FMT_61_SATB_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
+ EXTRACT_FMT_61_SATB_CODE
CPU (h_gr[f_r1]) = (GESI (OPRND (sr), 127)) ? (127) : (LESI (OPRND (sr), -128)) ? (-128) : (OPRND (sr));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
SEM_FN_NAME (m32rx,sath) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_59_satb.f
+#define OPRND(f) par_exec->operands.fmt_61_satb.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- EXTRACT_FMT_59_SATB_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
- EXTRACT_FMT_59_SATB_CODE
+ EXTRACT_FMT_61_SATB_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
+ EXTRACT_FMT_61_SATB_CODE
CPU (h_gr[f_r1]) = (GESI (OPRND (sr), 32767)) ? (32767) : (LESI (OPRND (sr), -32768)) ? (-32768) : (OPRND (sr));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
SEM_FN_NAME (m32rx,sat) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_60_sat.f
+#define OPRND(f) par_exec->operands.fmt_62_sat.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- EXTRACT_FMT_60_SAT_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
- EXTRACT_FMT_60_SAT_CODE
+ EXTRACT_FMT_62_SAT_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
+ EXTRACT_FMT_62_SAT_CODE
CPU (h_gr[f_r1]) = ((OPRND (condbit)) ? (((LTSI (OPRND (sr), 0)) ? (2147483647) : (0x80000000))) : (OPRND (sr)));
TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
SEM_FN_NAME (m32rx,sadd) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_61_sadd.f
+#define OPRND(f) par_exec->operands.fmt_63_sadd.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- EXTRACT_FMT_61_SADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_61_SADD_CODE
+ EXTRACT_FMT_63_SADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_63_SADD_CODE
m32rx_h_accums_set (current_cpu, 0, ADDDI (SRADI (OPRND (h_accums_1), 16), OPRND (h_accums_0)));
TRACE_RESULT (current_cpu, "h-accums-0", 'D', m32rx_h_accums_get (current_cpu, 0));
SEM_FN_NAME (m32rx,macwu1) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_62_macwu1.f
+#define OPRND(f) par_exec->operands.fmt_64_macwu1.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- EXTRACT_FMT_62_MACWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_62_MACWU1_CODE
+ EXTRACT_FMT_64_MACWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_64_MACWU1_CODE
m32rx_h_accums_set (current_cpu, 1, SRADI (SLLDI (ADDDI (OPRND (h_accums_1), MULDI (EXTSIDI (OPRND (src1)), EXTSIDI (ANDSI (OPRND (src2), 65535)))), 8), 8));
TRACE_RESULT (current_cpu, "h-accums-1", 'D', m32rx_h_accums_get (current_cpu, 1));
SEM_FN_NAME (m32rx,msblo) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_63_msblo.f
+#define OPRND(f) par_exec->operands.fmt_38_macwhi.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- EXTRACT_FMT_63_MSBLO_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_63_MSBLO_CODE
+ EXTRACT_FMT_38_MACWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_38_MACWHI_CODE
CPU (h_accum) = SRADI (SLLDI (SUBDI (OPRND (accum), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (OPRND (src1))), EXTHIDI (TRUNCSIHI (OPRND (src2)))), 32), 16)), 8), 8);
TRACE_RESULT (current_cpu, "accum", 'D', CPU (h_accum));
SEM_FN_NAME (m32rx,mulwu1) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_64_mulwu1.f
+#define OPRND(f) par_exec->operands.fmt_65_mulwu1.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- EXTRACT_FMT_64_MULWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_64_MULWU1_CODE
+ EXTRACT_FMT_65_MULWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_65_MULWU1_CODE
m32rx_h_accums_set (current_cpu, 1, SRADI (SLLDI (MULDI (EXTSIDI (OPRND (src1)), EXTSIDI (ANDSI (OPRND (src2), 65535))), 16), 16));
TRACE_RESULT (current_cpu, "h-accums-1", 'D', m32rx_h_accums_get (current_cpu, 1));
SEM_FN_NAME (m32rx,maclh1) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_62_macwu1.f
+#define OPRND(f) par_exec->operands.fmt_64_macwu1.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- EXTRACT_FMT_62_MACWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_62_MACWU1_CODE
+ EXTRACT_FMT_64_MACWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_64_MACWU1_CODE
m32rx_h_accums_set (current_cpu, 1, SRADI (SLLDI (ADDDI (OPRND (h_accums_1), SRADI (SLLDI (MULDI (EXTSIDI (SRASI (OPRND (src1), 16)), EXTHIDI (TRUNCSIHI (OPRND (src2)))), 32), 16)), 8), 8));
TRACE_RESULT (current_cpu, "h-accums-1", 'D', m32rx_h_accums_get (current_cpu, 1));
SEM_FN_NAME (m32rx,sc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_65_sc.f
+#define OPRND(f) par_exec->operands.fmt_66_sc.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- EXTRACT_FMT_65_SC_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_65_SC_CODE
+ EXTRACT_FMT_66_SC_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_66_SC_CODE
if (OPRND (condbit)) {
BRANCH_NEW_PC (new_pc, NEW_PC_SKIP);
SEM_FN_NAME (m32rx,snc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_65_sc.f
+#define OPRND(f) par_exec->operands.fmt_66_sc.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- EXTRACT_FMT_65_SC_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_65_SC_CODE
+ EXTRACT_FMT_66_SC_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_66_SC_CODE
if (NOTBI (OPRND (condbit))) {
BRANCH_NEW_PC (new_pc, NEW_PC_SKIP);